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Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. We aim to improve flash reliability with a multitude of low-cost…

Hardware Architecture · Computer Science 2018-08-16 Yixin Luo

Due to the immense potential of quantum computers and the significant computing overhead required in machine learning applications, the variational quantum classifier (VQC) has received a lot of interest recently for image classification.…

Quantum Physics · Physics 2022-12-20 Ruiyang Qin , Zhiding Liang , Jinglei Cheng , Peter Kogge , Yiyu Shi

Low-light image enhancement remains a challenging problem due to severe noise, color distortion, contrast degradation, and loss of structural details under insufficient illumination. Existing methods typically apply uniform enhancement…

Image and Video Processing · Electrical Eng. & Systems 2026-05-19 Bibhabasu Debnath , Sahana Ray , Sanjay Ghosh

Processing in memory (PiM) represents a promising computing paradigm to enhance performance of numerous data-intensive applications. Variants performing computing directly in emerging nonvolatile memories can deliver very high energy…

Atomic resolution STEM images often suffer from noise due to low electron doses and instrument imperfections, hence it is challenging to obtain critical structural details required for material analysis. To address the problem, we propose a…

Materials Science · Physics 2024-12-18 Z. Awan , J. Shabeer , U. Saleem , S. Mehmood , T. Qadeer

Mixed-precision quantization can potentially achieve the optimal tradeoff between performance and compression rate of deep neural networks, and thus, have been widely investigated. However, it lacks a systematic method to determine the…

Machine Learning · Computer Science 2021-02-23 Huanrui Yang , Lin Duan , Yiran Chen , Hai Li

Poor DRAM technology scaling over the course of many years has caused DRAM-based main memory to increasingly become a larger system bottleneck. A major reason for the bottleneck is that data stored within DRAM must be moved across a…

Hardware Architecture · Computer Science 2018-02-02 Saugata Ghose , Kevin Hsieh , Amirali Boroumand , Rachata Ausavarungnirun , Onur Mutlu

Non-volatile memory (NVM) crossbars have been identified as a promising technology, for accelerating important machine learning operations, with matrix-vector multiplication being a key example. Binary neural networks (BNNs) are especially…

Emerging Technologies · Computer Science 2023-08-14 Ruirong Huang , Zichao Yue , Caroline Huang , Janarbek Matai , Zhiru Zhang

Quantum memory devices with high storage efficiency and bandwidth are essential elements for future quantum networks. Solid-state quantum memories can provide broadband storage, but they primarily suffer from low storage efficiency. We use…

Quantum Physics · Physics 2024-04-08 Yisheng Lei , Haechan An , Zongfeng Li , Mahdi Hosseini

Accurate multiple-input multiple-output (MIMO) channel estimation is critical for next-generation wireless systems, enabling enhanced communication and sensing performance. Traditional model-based channel estimation methods suffer, however,…

Signal Processing · Electrical Eng. & Systems 2026-02-02 Seyed Alireza Javid , Nuria González-Prelcic

Neuromorphic or neurally-inspired optimizers rely on local but parallel parameter updates to solve problems that range from quadratic programming to Ising machines. An ideal realization of such an optimizer not only uses a compute-in-memory…

Machine Learning · Computer Science 2026-03-31 Zihao Chen , Faiek Ahsan , Johannes Leugering , Gert Cauwenberghs , Shantanu Chakrabartty

The large beamforming gain used to operate at millimeter wave (mmWave) frequencies requires obtaining channel information to configure hybrid antenna arrays. Previously proposed wideband channel estimation strategies, however, assume…

Signal Processing · Electrical Eng. & Systems 2019-06-06 Javier Rodriguez-Fernandez , Nuria Gonzalez-Prelcic

We solve the analysis sparse coding problem considering a combination of convex and non-convex sparsity promoting penalties. The multi-penalty formulation results in an iterative algorithm involving proximal-averaging. We then unfold the…

Large language model (LLM) pruning with fixed N:M structured sparsity significantly limits the expressivity of the sparse model, yielding sub-optimal performance. In contrast, supporting multiple N:M patterns to provide sparse…

Machine Learning · Computer Science 2025-04-22 Akshat Ramachandran , Souvik Kundu , Arnab Raha , Shamik Kundu , Deepak K. Mathaikutty , Tushar Krishna

With the increasing deployment of generative machine learning models in privacy-sensitive domains such as healthcare and personalized services, ensuring secure inference has become a critical challenge. Secure multi-party computation (MPC)…

Machine Learning · Computer Science 2025-08-05 Tianpei Lu , Bingsheng Zhang , Lekun Peng , Bowen Zheng , Lichun Li , Kui Ren

Memristive Processing In-Memory (PIM) is one of the promising techniques for overcoming the Von-Neumann bottleneck. Reduction of data transfer between processor and memory and data processing by memristors in data-intensive applications…

Emerging Technologies · Computer Science 2024-10-15 Seyed Erfan Fatemieh , Bahareh Bagheralmoosavi , Mohammad Reza Reshadinezhad

The current flash memory technology focuses on the cost minimization of its static storage capacity. However, the resulting approach supports a relatively small number of program-erase cycles. This technology is effective for consumer…

Information Theory · Computer Science 2015-01-05 Eyal En Gad , Eitan Yaakobi , Anxiao , Jiang , Jehoshua Bruck

The deployment of Quantized Neural Networks (QNN) on advanced microcontrollers requires optimized software to exploit digital signal processing (DSP) extensions of modern instruction set architectures (ISA). As such, recent research…

Hardware Architecture · Computer Science 2020-07-16 Nazareno Bruschi , Angelo Garofalo , Francesco Conti , Giuseppe Tagliavini , Davide Rossi

To mitigate the impact of noise and interference on multi-level-cell (MLC) flash memory with the use of low-density parity-check (LDPC) codes, we propose a dynamic write-voltage design scheme considering the asymmetric property of raw bit…

Signal Processing · Electrical Eng. & Systems 2022-09-07 Runbin Cai , Yi Fang , Zhifang Shi , Lin Dai , Guojun Han

The advancement of large language models has led to models with billions of parameters, significantly increasing memory and compute demands. Serving such models on conventional hardware is challenging due to limited DRAM capacity and high…

Hardware Architecture · Computer Science 2025-11-18 Yongjoo Jang , Sangwoo Hwang , Hojin Lee , Sangwoo Jung , Donghun Lee , Wonbo Shim , Jaeha Kung