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Construction of explicit quantum circuits follows the notion of the "standard circuit model" introduced in the solid and profound analysis of elementary gates providing quantum computation. Nevertheless the model is not always optimal (e.g.…
This is a comprehensive review on fault-tolerant topological quantum computation with the surface codes. The basic concepts and useful tools underlying fault-tolerant quantum computation, such as universal quantum computation, stabilizer…
In existing general-purpose architectures for surface-code-based fault-tolerant quantum computers, the cost of a quantum computation is determined by the circuit volume, i.e., the number of qubits multiplied by the number of non-Clifford…
Fault-tolerant logic gates will consume a large proportion of the resources of a two-dimensional quantum computing architecture. Here we show how to perform a fault-tolerant non-Clifford gate with the surface code; a quantum…
We introduce a prototype FPGA decoder implementing the recently discovered Relay-BP algorithm and targeting memory experiments on the $[[144,12,12]]$ bivariate bicycle quantum low-density parity check code. The decoder is both fast and…
Suppressing errors is the central challenge for useful quantum computing, requiring quantum error correction for large-scale processing. However, the overhead in the realization of error-corrected ``logical'' qubits, where information is…
We introduce and experimentally test a machine-learning-based method for ranking logically equivalent quantum circuits based on expected performance estimates derived from a training procedure conducted on real hardware. We apply our method…
Discovering low-overhead quantum error-correcting codes is of significant interest for fault-tolerant quantum computation. For hardware capable of long-range connectivity, the bivariate bicycle codes offer significant overhead reduction…
Generalized Bicycle (GB) codes offer a compelling alternative to surface codes for quantum error correction. This paper focuses on (2,2)-Generalized Bicycle codes, constructed from pairs of binary circulant matrices with two non-zero…
Utility-scale quantum computing requires quantum error correction (QEC) to protect quantum information against noise. Currently, superconducting hardware is a promising candidate for achieving fault tolerance due to its fast gate times and…
Quantum repeater is the key technology enabler for long-distance quantum communication. To date, most of the existing quantum repeater protocols are designed based on specific quantum codes or graph states. In this paper, we propose a…
Fault-tolerant quantum computing hinges on efficient logical compilation, in particular, translating high-level circuits into code-compatible implementations. Gate-by-gate compilation often yields deep circuits, requiring significant…
Exploring an efficient and scalable architecture of fault-tolerant quantum computing (FTQC) is vital for demonstrating useful quantum computing. Here, we propose and evaluate a scalable and practical architecture with a…
Fabrication errors pose a significant challenge in scaling up solid-state quantum devices to the sizes required for fault-tolerant (FT) quantum applications. To mitigate the resource overhead caused by fabrication errors, we combine two…
Fast, reliable logical operations are essential for realizing useful quantum computers. By redundantly encoding logical qubits into many physical qubits and using syndrome measurements to detect and correct errors, one can achieve low…
State of the art quantum computing architectures are founded on the decision to use scalable but faulty quantum hardware in conjunction with an efficient error correcting code capable of tolerating high error rates. The promised effect of…
Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional…
We describe a concrete device roadmap towards a fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our roadmap encompasses four generations of devices: a single-qubit…
Constructing general programmable circuits to be able to run any given unitary operator efficiently on a quantum processor is of fundamental importance. We present a new quantum circuit design technique resulting two general programmable…
Quantum computing relies on quantum error correction for high-fidelity logical operations, but scaling to achieve near-term quantum utility is highly resource-intensive. High-rate quantum LDPC codes can reduce error correction overhead, yet…