Related papers: TrapSIMD: SIMD-Aware Compiler Optimization for 2D …
Most attempts to produce a scalable quantum information processing platform based on ion traps have focused on the shuttling of ions in segmented traps. We show that an architecture based on an array of microtraps with fast gates will…
We propose a scalable ion trap architecture for universal quantum computation, which is composed of an array of ion traps with one ion confined in each trap. The neighboring traps are designed capable of merging into one single trap. The…
In this paper, we present Hexagon-MLIR,an open-source compilation stack that targets Qualcomm Hexagon Neural Processing Unit (NPU) and provides unified support for lowering Triton kernels and PyTorch models . Built using the MLIR framework,…
As an emerging type of AI computing accelerator, SRAM Computing-In-Memory (CIM) accelerators feature high energy efficiency and throughput. However, various CIM designs and under-explored mapping strategies impede the full exploration of…
We present a parallelized differentiable traffic simulator based on the Intelligent Driver Model (IDM), a car-following framework that incorporates driver behavior as key variables. Our vehicle simulator efficiently models vehicle motion,…
Fast and accurate load parameters identification has great impact on the power systems operation and stability analysis. This paper proposes a novel transfer reinforcement learning based method to identify composite ZIP and induction motor…
Achieving high efficiency on AI operators demands precise control over computation and data movement. However, existing scheduling languages are locked into specific compiler ecosystems, preventing fair comparison, reuse, and evaluation…
Compression algorithms are important for data oriented tasks, especially in the era of Big Data. Modern processors equipped with powerful SIMD instruction sets, provide us an opportunity for achieving better compression performance.…
Modern ML methods excel when training data is IID, large-scale, and well labeled. Learning in less ideal conditions remains an open challenge. The sub-fields of few-shot, continual, transfer, and representation learning have made…
The enhanced efficiency of hardware accelerators, including Single Instruction Multiple Data (SIMD) architectures and Coarse-Grained Reconfigurable Architectures (CGRAs), is driving significant advancements in Artificial Intelligence and…
The Mixture-of-Experts (MoE) models have emerged as the state-of-the-art paradigm for scaling up large language models (LLMs) without proportionally increased computational cost. However, its on-device deployment faces a critical challenge…
The SIMT execution model is commonly used for general GPU development. CUDA and OpenCL developers write scalar code that is implicitly parallelized by compiler and hardware. On Intel GPUs, however, this abstraction has profound performance…
Trapped ions in radio-frequency traps are among the leading approaches for realizing quantum computers, due to high-fidelity quantum gates and long coherence times. However, the use of radio-frequencies presents a number of challenges to…
A theoretical memory with limited processing power and internal connectivity at each element is proposed. This memory carries out parallel processing within itself to solve generic array problems. The applicability of this in-memory…
Multi-mode superconducting circuits offer a promising platform for engineering robust systems for quantum computation. Previous studies indicate that single-mode devices cannot be engineered to simultaneously exhibit resilience against…
Microfabricated ion trap chips are at the core of some of the most advanced quantum computers. How a large number of ions is arranged and controlled on an ion trap chip depends on the chosen trap architecture. One such architecture is the…
This article describes algorithms for the hybrid parallelization and SIMD vectorization of molecular dynamics simulations with short-range forces. The parallelization method combines domain decomposition with a thread-based parallelization…
The scaling up of trapped-ion quantum processors based on the quantum charge-coupled device (QCCD) architecture is difficult owing to the extensive electronics and high-density wiring required to control numerous trap electrodes. In…
In this paper we extend the concept of the traditional transactor, which focuses on correct content transfer, to a new timing-coherent transactor that also accurately aligns the timing of each transaction boundary so that designers can…
The increasing demand for intelligent mobile applications has made multi-agent collaboration with Transformer-based large language models (LLMs) essential in mobile edge computing (MEC) networks. However, training LLMs in such environments…