English
Related papers

Related papers: Banked Memories for Soft SIMT Processors

200 papers

Although modern FPGAs have a performance potential of a 1 GHz clock frequency - with both clock networks and embedded blocks such as memories and DSP Blocks capable of these clock rates - user implementations approaching this speed are…

Hardware Architecture · Computer Science 2025-04-11 Martin Langhammer , Gregg Baeckler , Kim Bozman

This paper introduces the eGPU, a SIMT soft processor designed for FPGAs. Soft processors typically achieve modest operating frequencies, a fraction of the headline performance claimed by modern FPGA families, and obtain correspondingly…

Hardware Architecture · Computer Science 2023-07-18 Martin Langhammer , George Constantinides

Current soft processor architectures for FPGAs do not utilize the potential of the massive parallelism available. FPGAs now support many thousands of embedded floating point operators, and have similar computational densities to GPGPUs.…

Hardware Architecture · Computer Science 2024-01-10 Martin Langhammer , George A. Constantinides

Memory management is necessary with the increasing number of multi-connected AI devices and data bandwidth issues. For this purpose, high-speed multi-port memory is used. The traditional multi-port memory solutions are hard-bounded to a…

Hardware Architecture · Computer Science 2024-11-08 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

With the growing number of data-intensive workloads, GPU, which is the state-of-the-art single-instruction-multiple-thread (SIMT) processor, is hindered by the memory bandwidth wall. To alleviate this bottleneck, previously proposed…

Hardware Architecture · Computer Science 2021-03-12 Xinfeng Xie , Peng Gu , Yufei Ding , Dimin Niu , Hongzhong Zheng , Yuan Xie

Modern day applications have grown in size and require more computational power. The rise of machine learning and AI increased the need for parallel computation, which has increased the need for GPGPUs. With the increasing demand for…

Hardware Architecture · Computer Science 2025-03-25 Injae Shin , Blaise Tine

We present a customizable soft architecture which allows for the execution of GPGPU code on an FPGA without the need to recompile the design. Issues related to scaling the overlay architecture to multiple GPGPU multiprocessors are…

Hardware Architecture · Computer Science 2016-06-22 Kevin Andryc , Tedy Thomas , Russell Tessier

eGPU, a recently-reported soft GPGPU for FPGAs, has demonstrated very high clock frequencies (more than 750 MHz) and small footprint. This means that for the first time, commercial soft processors may be competitive for the kind of heavy…

Hardware Architecture · Computer Science 2024-06-06 Martin Langhammer , George A. Constantinides

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of applications. Emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D…

Hardware Architecture · Computer Science 2024-03-19 Fei Wen , Mian Qin , Paul V. Gratz , A. L. Narasimha Reddy

The growing capacity of integration allows to instantiate hundreds of soft-core processors in a single FPGA to create a reconfigurable multiprocessing system. Lately, FPGAs have been proven to give a higher energy efficiency than…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-05-03 David Castells-Rufas , Albert Saa-Garriga , Jordi Carrabina

Many performance critical systems today must rely on performance enhancements, such as multi-port memories, to keep up with the increasing demand of memory-access capacity. However, the large area footprints and complexity of existing…

Hardware Architecture · Computer Science 2020-01-28 Hardik Jain , Matthew Edwards , Ethan Elenberg , Ankit Singh Rawat , Sriram Vishwanath

FPGA-based data processing in datacenters is increasing in popularity due to the demands of modern workloads and the ensuing necessity for specialization in hardware. Driven by this trend, vendors are rapidly adapting reconfigurable devices…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-06 Kaan Kara , Christoph Hagleitner , Dionysios Diamantopoulos , Dimitris Syrivelis , Gustavo Alonso

This paper describes a multi-functional deep in-memory processor for inference applications. Deep in-memory processing is achieved by embedding pitch-matched low-SNR analog processing into a standard 6T 16KB SRAM array in 65 nm CMOS. Four…

Hardware Architecture · Computer Science 2016-10-25 Mingu Kang , Sujan Gonugondla , Ameya Patil , Naresh Shanbhag

This paper presents 6T SRAM cell-based bit-parallel in-memory computing (IMC) architecture to support various computations with reconfigurable bit-precision. In the proposed technique, bit-line computation is performed with a short WL…

Hardware Architecture · Computer Science 2020-08-11 Kyeongho Lee , Jinho Jeong , Sungsoo Cheon , Woong Choi , Jongsun Park

FPGAs are increasingly utilized in data centers due to their capacity to exploit data parallelism in computationally intensive workloads. Furthermore, the processing of modern data center workloads requires moving vast amounts of data,…

Hardware Architecture · Computer Science 2025-07-02 Andrea Galimberti , Gabriele Montanaro , Andrea Motta , Federico Proverbio , Davide Zoni

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

Hardware Architecture · Computer Science 2020-03-31 Maria A. Dávila-Guzmán , Rubén Gran Tejero , María Villarroya-Gaudó , Darío Suárez Gracia

Field programmable gate arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Increases in FPGA configurable logic capacity and decreasing FPGA costs have enabled designers to more readily incorporate FPGAs…

Hardware Architecture · Computer Science 2011-11-09 Roman Lysecky , Frank Vahid

In this work, we propose a configurable many-core overlay for high-performance embedded computing. The size of internal memory, supported operations and number of ports can be configured independently for each core of the overlay. The…

Hardware Architecture · Computer Science 2014-08-25 Mário Véstias , Horácio Neto

In the field of digital signal processing, the fast Fourier transform (FFT) is a fundamental algorithm, with its processors being implemented using either the pipelined architecture, well-known for high-throughput applications but weak in…

Hardware Architecture · Computer Science 2025-01-03 Fangyu Zhao , Chunhua Xiao , Zhiguo Wang , Xiaohua Du , Bo Dong

The exponential growth of Internet of Things (IoT) applications has intensified the demand for efficient, high-throughput, and energy-efficient data processing at the edge. Conventional CPU-centric encryption methods suffer from performance…

Cryptography and Security · Computer Science 2025-06-19 Rasha Karakchi , Rye Stahle-Smith , Nishant Chinnasami , Tiffany Yu
‹ Prev 1 2 3 10 Next ›