English
Related papers

Related papers: Monte Cimone v2: Down the Road of RISC-V High-Perf…

200 papers

As RISC-V adoption accelerates, domains such as automotive, the Internet of Things (IoT), and industrial control are attracting growing attention. These domains are subject to stringent Size, Weight, Power, and Cost (SWaP-C) constraints,…

Open-source RISC-V cores are increasingly demanded in domains like automotive and space, where achieving high instructions per cycle (IPC) through superscalar and out-of-order (OoO) execution is crucial. However, high-performance…

Hardware Architecture · Computer Science 2025-06-02 Zexin Fu , Riccardo Tedeschi , Gianmarco Ottavi , Nils Wistoff , César Fuguet , Davide Rossi , Luca Benini

Compared to the first generation of deep neural networks, dominated by regular, compute-intensive kernels such as matrix multiplications (MatMuls) and convolutions, modern decoder-based transformers interleave attention, normalization, and…

Hardware Architecture · Computer Science 2026-03-06 Max Wipfli , Gamze İslamoğlu , Navaneeth Kunhi Purayil , Angelo Garofalo , Luca Benini

Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable…

Hardware Architecture · Computer Science 2022-09-05 Gianna Paulin , Matheus Cavalcante , Paul Scheffler , Luca Bertaccini , Yichao Zhang , Frank Gürkaynak , Luca Benini

The rapid progress and advancement in electronic chips technology provide a variety of new implementation options for system engineers. The choice varies between the flexible programs running on a general-purpose processor (GPP) and the…

Hardware Architecture · Computer Science 2019-04-11 Issam Damaj

The emergence and rapid development of the open RISC-V instruction set architecture opens up new horizons on the way to efficient devices, ranging from existing low-power IoT boards to future high-performance servers. The effective use of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-04 Evgeny Kozinov , Evgeny Vasiliev , Andrey Gorshkov , Valentina Kustikova , Artem Maklaev , Valentin Volokitin , Iosif Meyerov

Managing energy and thermal profiles is critical for many-core HPC processors with hundreds of application-class processing elements (PEs). Advanced model predictive control (MPC) delivers state-of-the-art performance but requires solving…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-13 Alessandro Ottaviano , Andrino Meli , Paul Scheffler , Giovanni Bambini , Robert Balas , Davide Rossi , Andrea Bartolini , Luca Benini

High performance computing (HPC) devices is no longer exclusive for academic, R&D, or military purposes. The use of HPC device such as supercomputer now growing rapidly as some new area arise such as big data, and computer simulation. It…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-03-02 Abdurrachman Mappuji , Nazrul Effendy , Muhamad Mustaghfirin , Fandy Sondok , Rara Priska Yuniar , Sheptiani Putri Pangesti

This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relatively high number of operands, reducing the instruction count…

Hardware Architecture · Computer Science 2021-06-15 Philippos Papaphilippou , Paul H. J. Kelly , Wayne Luk

Embedded systems are pervasively used in many fields nowadays. In mixed-criticality environments (automotive, industry 4.0, drones, etc.) they need to run real-time applications with certain time and safety constraints alongside a rich…

Cryptography and Security · Computer Science 2021-11-05 Flavia Caforio , Pierpaolo Iannicelli , Michele Paolino , Daniel Raho

Spiking Neural Networks (SNNs) have gained significant attention in edge computing due to their low power consumption and computational efficiency. However, existing implementations either use conventional System on Chip (SoC) architectures…

Hardware Architecture · Computer Science 2026-03-13 Kanishka Gunawardana , Sanka Peeris , Kavishka Rambukwella , Thamish Wanduragala , Saadia Jameel , Roshan Ragel , Isuru Nawinne

Large-scale ML accelerators rely on large numbers of PEs, imposing strict bounds on the area and energy budget of each PE. Prior work demonstrates that limited dual-issue capabilities can be efficiently integrated into a lightweight…

Hardware Architecture · Computer Science 2026-01-27 Luca Colagrande , Luca Benini

Heterogeneous multi-core architectures combine on a single chip a few large, general-purpose host cores, optimized for single-thread performance, with (many) clusters of small, specialized, energy-efficient accelerator cores for…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-12 Luca Colagrande , Luca Benini

Funded by the UK ExCALIBUR H\&ES exascale programme, in early 2022 a RISC-V testbed for HPC was stood up to provide free access for scientific software developers to experiment with RISC-V for their workloads. Here we report on successes,…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-02 Nick Brown , Maurice Jamieson , Joseph K. L. Lee

Funded by the UK ExCALIBUR H&ES exascale programme, since early 2022 we have provided a RISC-V testbed for HPC to offer free access for scientific software developers to experiment with RISC-V for their workloads. Based upon our experiences…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-06-19 Nick Brown

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

A range of RISC-V based accelerators are available and coming to market, and there is strong potential for these to be used for High Performance Computing (HPC) workloads. However, such accelerators tend to provide bespoke programming…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-03 Nick Brown , Jake Davies , Felix LeClair

In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is based on a multiprocessor NOEL-V, an established space-grade processor, which is integrated…

Hardware Architecture · Computer Science 2025-03-03 Marc Solé i Bonet , Jannis Wolf , Leonidas Kosmidis

Virtualization is a key technology used in a wide range of applications, from cloud computing to embedded systems. Over the last few years, mainstream computer architectures were extended with hardware virtualization support, giving rise to…

Hardware Architecture · Computer Science 2023-08-07 Bruno Sá , Luca Valente , José Martins , Davide Rossi , Luca Benini , Sandro Pinto

Vector architectures are gaining traction for highly efficient processing of data-parallel workloads, driven by all major ISAs (RISC-V, Arm, Intel), and boosted by landmark chips, like the Arm SVE-based Fujitsu A64FX, powering the TOP500…

Hardware Architecture · Computer Science 2025-01-10 Matteo Perotti , Matheus Cavalcante , Nils Wistoff , Renzo Andri , Lukas Cavigelli , Luca Benini