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Continual learning (CL) on edge devices requires not only high accuracy but also training-time efficiency to support on-device adaptation under strict memory and computational constraints. While prompt-based continual learning (PCL) is…

Machine Learning · Computer Science 2026-04-10 Wonseon Lim , Jaesung Lee , Dae-Won Kim

Persistent memory provides high-performance data persistence at main memory. Memory writes need to be performed in strict order to satisfy storage consistency requirements and enable correct recovery from system crashes. Unfortunately,…

Hardware Architecture · Computer Science 2017-05-11 Youyou Lu , Jiwu Shu , Long Sun , Onur Mutlu

Large language models (LLMs) hold tremendous potential for addressing numerous real-world challenges, yet they typically demand significant computational resources and memory. Deploying LLMs onto a resource-limited hardware device with…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-02 Pujiang He , Shan Zhou , Changqing Li , Wenhuan Huang , Weifei Yu , Duyi Wang , Chen Meng , Sheng Gui

Contrast maximization (CMAX) is a direct geometric framework for event-based motion estimation, but its iterative warp-and-accumulate pipeline incurs input-dependent computation and frequent memory accesses, challenging real-time, low-power…

Hardware Architecture · Computer Science 2026-05-26 Kyeongpil Min , Jongin Choi , Kyeongwon Lee , Woojoo Lee

Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high-performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Among candidate solid-state…

Hardware Architecture · Computer Science 2017-04-19 Wonil Choi , Mohammad Arjomand , Myoungsoo Jung , Mahmut Kandemir

As the size of artificial intelligence and machine learning (AI/ML) models and datasets grows, the memory bandwidth becomes a critical bottleneck. The paper presents a novel extended memory hierarchy that addresses some major memory…

Hardware Architecture · Computer Science 2025-05-20 Jordi Altayo , Paul Delestrac , David Novo , Simey Yang , Debjyoti Bhattacharjee , Francky Catthoor

This paper proposes a novel way to assist conventional data address translation. The approach, PC-Indexed Data Address Translation (PCAX), uses the PC of a load instruction, and not a data virtual address, to obtain the page table entry…

Hardware Architecture · Computer Science 2026-04-02 Shyam Murthy , Gurindar S Sohi

The configurable building blocks of current FPGAs -- Logic blocks (LBs), Digital Signal Processing (DSP) slices, and Block RAMs (BRAMs) -- make them efficient hardware accelerators for the rapid-changing world of Deep Learning (DL).…

Hardware Architecture · Computer Science 2021-10-01 Aman Arora , Bagus Hanindhito , Lizy K. John

Resilience is a major design goal for HPC. Checkpoint is the most common method to enable resilient HPC. Checkpoint periodically saves critical data objects to non-volatile storage to enable data persistence. However, using checkpoint, we…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-05-03 Yingchao Huang , Kai Wu , Dong Li

Memory-augmented LLM agents offer an appealing shortcut to continual learning: rather than updating model parameters, they accumulate experience in external memory, seemingly sidestepping the stability-plasticity dilemma of parametric…

Machine Learning · Computer Science 2026-05-01 Qisheng Hu , Quanyu Long , Wenya Wang

GPU-based concurrent data structures (CDSs) achieve high throughput for read-only queries, but efficient support for dynamic updates on fully GPU-resident data remains challenging. Ordered CDSs (e.g., B-trees and LSM-trees) maintain an…

Databases · Computer Science 2026-04-21 Rosina Kharal , Trevor Brown , Justus Henneberg , Felix Schuhknecht

A practical large language model (LLM) service may involve a long system prompt, which specifies the instructions, examples, and knowledge documents of the task and is reused across requests. However, the long system prompt causes…

Computation and Language · Computer Science 2024-05-31 Lei Zhu , Xinjiang Wang , Wayne Zhang , Rynson W. H. Lau

Large language models have high compute, latency, and memory requirements. While specialized accelerators such as GPUs and TPUs typically run these workloads, CPUs are more widely available and consume less energy. Accelerating LLMs with…

Unlike non-volatile memory that resides on the processor memory bus, memory-semantic solid-state drives (SSDs) support both byte and block access granularity via PCIe or CXL interconnects. They provide scalable memory capacity using NAND…

Operating Systems · Computer Science 2025-01-10 Shaobo Li , Yirui Eric Zhou , Hao Ren , Jian Huang

Persistent memory (pmem) products bring the persistence domain up to the memory level. Intel recently introduced the eADR feature that guarantees to flush data buffered in CPU cache to pmem on a power outage, thereby making the CPU cache a…

Hardware Architecture · Computer Science 2022-11-01 Chongnan Ye , Meng Chen , Qisheng Jiang , Chundong Wang

Memory caches are being aggressively used in today's data-parallel frameworks such as Spark, Tez and Storm. By caching input and intermediate data in memory, compute tasks can witness speedup by orders of magnitude. To maximize the chance…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-08-29 Yinghao Yu , Wei Wang , Jun Zhang , Khaled B. Letaief

The ability to learn in dynamic, nonstationary environments without forgetting previous knowledge, also known as Continual Learning (CL), is a key enabler for scalable and trustworthy deployments of adaptive solutions. While the importance…

Machine Learning · Computer Science 2021-03-25 Andrea Cossu , Antonio Carta , Davide Bacciu

AI-powered edge devices currently lack the ability to adapt their embedded inference models to the ever-changing environment. To tackle this issue, Continual Learning (CL) strategies aim at incrementally improving the decision capabilities…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-28 Leonardo Ravaglia , Manuele Rusci , Alessandro Capotondi , Francesco Conti , Lorenzo Pellegrini , Vincenzo Lomonaco , Davide Maltoni , Luca Benini

The ever-growing scale of data parallelism in today's HPC and ML applications presents a big challenge for computing architectures' energy efficiency and performance. Vector processors address the scale-up challenge by decoupling Vector…

Hardware Architecture · Computer Science 2025-08-14 Navaneeth Kunhi Purayil , Matteo Perotti , Tim Fischer , Luca Benini

Content-based routing (CBR) is a powerful model that supports scalable asynchronous communication among large sets of geographically distributed nodes. Yet, preserving privacy represents a major limitation for the wide adoption of CBR,…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-01-18 Rafael Pires , Marcelo Pasin , Pascal Felber , Christof Fetzer