English
Related papers

Related papers: Runtime Tunable Tsetlin Machines for Edge Inferenc…

200 papers

Neural network accelerators with low latency and low energy consumption are desirable for edge computing. To create such accelerators, we propose a design flow for accelerating the extremely low bit-width neural network (ELB-NN) in embedded…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-29 Junsong Wang , Qiuwen Lou , Xiaofan Zhang , Chao Zhu , Yonghua Lin , Deming Chen

Deep neural network (DNN) inference relies increasingly on specialized hardware for high computational efficiency. This work introduces a field-programmable gate array (FPGA)-based dynamically configurable accelerator featuring systolic…

Hardware Architecture · Computer Science 2025-10-10 Anastasios Petropoulos , Theodore Antonakopoulos

We propose a distributed system based on lowpower embedded FPGAs designed for edge computing applications focused on exploring distributing scheduling optimizations for Deep Learning (DL) workloads to obtain the best performance regarding…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-31 Hans Johnson , Tianyang Fang , Alejandro Perez-Vicente , Jafar Saniie

The increasing demand for real-time, low-latency artificial intelligence applications has propelled the use of Field-Programmable Gate Arrays (FPGAs) for Convolutional Neural Network (CNN) implementations. FPGAs offer reconfigurability,…

Hardware Architecture · Computer Science 2025-10-06 Philippe Magalhães , Virginie Fresse , Benoît Suffran , Olivier Alata

Domain-specialized FPGAs have delivered unprecedented performance for low-latency inference across scientific and industrial workloads, yet nearly all existing accelerators assume static models trained offline, relegating learning and…

Hardware Architecture · Computer Science 2026-02-03 Duc Hoang

A typical machine learning (ML) development cycle for edge computing is to maximise the performance during model training and then minimise the memory/area footprint of the trained model for deployment on edge devices targeting CPUs, GPUs,…

Hardware Architecture · Computer Science 2023-09-29 Konstantinos Iordanou , Timothy Atkinson , Emre Ozer , Jedrzej Kufel , John Biggs , Gavin Brown , Mikel Lujan

The Tsetlin Machine (TM) is a novel alternative to deep neural networks (DNNs). Unlike DNNs, which rely on multi-path arithmetic operations, a TM learns propositional logic patterns from data literals using Tsetlin automata. This…

Machine Learning · Computer Science 2025-02-11 Shengyu Duan , Rishad Shafik , Alex Yakovlev

We present a customizable soft architecture which allows for the execution of GPGPU code on an FPGA without the need to recompile the design. Issues related to scaling the overlay architecture to multiple GPGPU multiprocessors are…

Hardware Architecture · Computer Science 2016-06-22 Kevin Andryc , Tedy Thomas , Russell Tessier

This paper introduces EdgeProfiler, a fast profiling framework designed for evaluating lightweight Large Language Models (LLMs) on edge systems. While LLMs offer remarkable capabilities in natural language understanding and generation,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-18 Alyssa Pinnock , Shakya Jayakody , Kawsher A Roxy , Md Rubel Ahmed

Transformer neural networks (TNN) excel in natural language processing (NLP), machine translation, and computer vision (CV) without relying on recurrent or convolutional layers. However, they have high computational and memory demands,…

Hardware Architecture · Computer Science 2025-12-30 Ehsan Kabir , Jason D. Bakos , David Andrews , Miaoqing Huang

The growing demands of distributed learning on resource constrained edge devices underscore the importance of efficient on device model compression. Tensor Train Decomposition (TTD) offers high compression ratios with minimal accuracy loss,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-19 Hyunseok Kwak , Kyeongwon Lee , Kyeongpil Min , Chaebin Jung , Woojoo Lee

The rapid growth of Internet-of-things (IoT) and artificial intelligence applications have called forth a new computing paradigm--edge computing. In this paper, we study the suitability of deploying FPGAs for edge computing from the…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-04-19 Saman Biookaghazadeh , Fengbo Ren , Ming Zhao

In natural language processing (NLP), the "Transformer" architecture was proposed as the first transduction model replying entirely on self-attention mechanisms without using sequence-aligned recurrent neural networks (RNNs) or convolution,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-20 Bingbing Li , Santosh Pandey , Haowen Fang , Yanjun Lyv , Ji Li , Jieyang Chen , Mimi Xie , Lipeng Wan , Hang Liu , Caiwen Ding

Heterogeneous embedded systems, with diverse computing elements and accelerators such as FPGAs, offer a promising platform for fast and flexible ML inference, which is crucial for services such as autonomous driving and augmented reality,…

Hardware Architecture · Computer Science 2026-02-16 Alexandros Patras , Spyros Lalis , Christos D. Antonopoulos , Nikolaos Bellas

Driven by the increasing demand for low-latency and real-time processing, machine learning applications are steadily migrating toward edge computing platforms, where Field-Programmable Gate Arrays (FPGAs) are widely adopted for their energy…

Hardware Architecture · Computer Science 2026-02-13 Jiahong Bi , Lars Schütze , Jeronimo Castrillon

FPGA-based heterogeneous architectures provide programmers with the ability to customize their hardware accelerators for flexible acceleration of many workloads. Nonetheless, such advantages come at the cost of sacrificing programmability.…

Hardware Architecture · Computer Science 2018-07-05 Jason Cong , Zhenman Fang , Yuchen Hao , Peng Wei , Cody Hao Yu , Chen Zhang , Peipei Zhou

Overlays have shown significant promise for field-programmable gate-arrays (FPGAs) as they allow for fast development cycles and remove many of the challenges of the traditional FPGA hardware design flow. However, this often comes with a…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-18 Mohamed S. Abdelfattah , David Han , Andrew Bitar , Roberto DiCecco , Shane OConnell , Nitika Shanker , Joseph Chu , Ian Prins , Joshua Fender , Andrew C. Ling , Gordon R. Chiu

Transposed Convolutions (TCONV) enable the up-scaling mechanism within generative Artificial Intelligence (AI) models. However, the predominant Input-Oriented Mapping (IOM) method for implementing TCONV has complex output mapping,…

Hardware Architecture · Computer Science 2025-07-11 Jude Haris , José Cano

As the need for edge computing grows, many modern consumer devices now contain edge machine learning (ML) accelerators that can compute a wide range of neural network (NN) models while still fitting within tight resource constraints. We…

Hardware Architecture · Computer Science 2021-03-02 Amirali Boroumand , Saugata Ghose , Berkin Akin , Ravi Narayanaswami , Geraldo F. Oliveira , Xiaoyu Ma , Eric Shiu , Onur Mutlu

Faster, cheaper, and more power efficient optimization solvers than those currently offered by general-purpose solutions are required for extending the use of model predictive control (MPC) to resource-constrained embedded platforms. We…

Systems and Control · Computer Science 2017-10-13 Juan L. Jerez , Paul J. Goulart , Stefan Richter , George A. Constantinides , Eric C. Kerrigan , Manfred Morari