Related papers: Latch Based Design for Fast Voltage Droop Response

Demand for on-chip low-dropout regulators (LDOs) with both high power-supply rejection ratio (PSRR) and fast transient response is growing as system-on-chip (SoC) integration increases. However, conventional LDO architectures face…

We present a comprehensive study of the frequency shifts associated with the lattice potential for a Sr lattice clock. By comparing two such clocks with a frequency stability reaching $5\times 10^{-17}$ after a one hour integration time,…

In this brief, we present a low-loss mechanically reconfigurable phase shifter implemented in gap-waveguide technology for mm-wave frequencies. The proposed design gives a practical implementation of tuning elements inside the waveguide…

This paper enumerates new architecture of low power dual-edge triggered Flip-Flop (DETFF) designed at 180nm CMOS technology. In DETFF same data throughput can be achieved with half of the clock frequency as compared to single edge triggered…

This paper presents an improved droop control method to ensure effective power sharing, voltage regulation, and frequency stabilization of inverter-based resources (IBRs) connected in parallel in an islanded AC microgrid. In the…

Effective early-stage detection of internal short circuit in lithium-ion batteries is crucial to preventing thermal runaway. This report proposes an effective approach to address this challenging issue, in which the current change, state of…

This paper proposes a framework for fast short-term scheduling and steady-state voltage control in distribution systems enabled with both continuous control devices, e.g., inverter interfaced DGs and discrete control devices (dcds), e.g.,…

This letter proposes a new design of frequency-locked loop (FLL) which is based on synchronous (dq) reference frame instead of stationary ({\alpha}\b{eta}) reference frame. First, a synchronous reference frame FLL (briefly called SRF-FLL0)…

We investigate the magnetic-field-induced frequency shift (MFS) of the clock "0-0" transition in the microwave quantum frequency standard (atomic clock) based on coherent population trapping (CPT) in $^{87}$Rb vapor. To scan the CPT…

This paper presents an architecture of high-resolution delay generator implemented in a single field programmable gate array (FPGA) chip by exploiting the method of utilizing dedicated carry chains. It serves as the core component in…

A dynamic phasor (DP) framework for time-domain and frequency-domain analyses of grid-forming converters (GFCs) connected to series-compensated transmission lines is proposed. The proposed framework can capture the behavior of GFCs…

Reversible logic has come to the forefront of theoretical and applied research today. Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential…

A network-level small-signal model is developed for lossy microgrids, which considers coupled angle and voltage dynamics of inverter-based microgrids and uses a more general framework of droop controls in the inverter. It is shown that when…

This study develops a computationally efficient phase-field lattice Boltzmann model with the capability to simulate thermocapillary flows. The model was implemented into the open-source simulation framework, waLBerla, and extended to…

We investigate a simple variation of the series RLC circuit in which anti-parallel diodes replace the resistor. This results in a damped harmonic oscillator with a nonlinear damping term that is maximal at zero current and decreases with an…

The upgrade of ATLAS Liquid Argon Calorimeter (LAr) Phase-1 trigger requires high-speed, low-latency data transmission to read out the Lar Trigger Digitizer Board (LTDB). A dual-channel transmitter ASIC LOCx2 have been designed and…

The concept of spontaneous symmetry breaking and off-diagonal long-range order (ODLRO) are associated with Bose-Einstein condensation. However, as in the system of reduced dimension the effect of quantum fluctuation is dominating, the…

We analyze spin squeezing via Rydberg dressing in optical lattice clocks with random fractional filling. We compare the achievable clock stability in different lattice geometries, including unity-filled tweezer clock arrays and fractionally…

This paper presents the novel Droop-e grid-forming inverter control strategy, which establishes an active power-frequency relationship based on an exponential function of the inverter power dispatch. The advantages of this control strategy…

Improving the speed and fidelity of quantum logic gates is essential to reach quantum advantage with future quantum computers. However, fast logic gates lead to increased leakage errors in superconducting quantum processors based on qubits…