Related papers: Latch Based Design for Fast Voltage Droop Response
Latch-based designs have many benefits over their flip-flop based counterparts but have limited use partially because most RTL specifications are flop-centric and automatic conversion of FF to latch-based designs is challenging.…
This paper presents a novel control structure and control synthesis method for regulating the output voltage/frequency and power injection of DC-AC inverters. The traditional droop method offers attractive solution to achieve compromise…
A clock synchronizing circuit for repeaterless low swing interconnects is presented in this paper. The circuit uses a delay locked loop (DLL) to generate multiple phases of the clock, of which the one closest to the center of the eye is…
Two-phase clocking offers significant advantages in timing margin and clock flexibility, yet its adoption remains limited due to the absence of automation in modern design flows. Managing strict non-overlap and 180$^\circ$ phase separation…
Globalization of IC manufacturing has led to increased security concerns, notably IP theft. Several logic locking techniques have been developed for protecting designs, but they typically display very large overhead, and are generally…
On-chip voltage regulation using distributed Digital Low Drop Out (LDO) voltage regulators has been identified as a promising technique for efficient power-management for emerging multi-core processors. Digital LDOs (DLDO) can offer low…
Logic locking has become a promising approach to provide hardware security in the face of a possibly insecure fabrication supply chain. While many techniques have focused on locking combinational logic (CL), an alternative latch-locking…
We present and characterize a modular, open-source system to perform feedback control experiments on configurations of atoms and molecules in arrays of optical tweezers. The system features a modular, cost-effective computer architecture…
Implementing frequency response using grid-connected inverters is one of the popular proposed alternatives to mitigate the dynamic degradation experienced in low inertia power systems. However, such solution faces several challenges as…
In current generation digital phase locked loop (DPLL) architectures, techniques like adaptive loop bandwidth with loop order switching and switched phase-detection are employed to achieve better lock time and jitter performance. This work…
The phase-locked loop (PLL) used in the doubly fed induction generator (DFIG) can cause frequency coupling phenomena, which will give negative resistance characteristics ofthe DFIG at low frequency, resulting in stability issues under weak…
In the last decades, the applications of power inverter increased rapidly. As a result, in spite of rectifier, an inverter with a high-power electronic oscillator has capability to convert direct current (DC) into alternating current (AC)…
Previously, we demonstrated hysteretic and persistent changes of resistivity in two-terminal electronic devices based on charge trapping and detrapping at immobile metastable defects [H. Yin, A. Kumar, J.M. LeBeau, and R. Jaramillo, Phys.…
This paper presents a new fast switching hybrid frequency synthesizer with wide locking range. The hybrid synthesizer is based on the tanlock loop with no delay block (NDTL) and is capable of integer as well as fractional frequency…
A widely embraced approach to mitigate the dynamic degradation in low-inertia power systems is to mimic generation response using grid-connected inverters to restore the grid's stiffness. In this paper, we seek to challenge this approach…
In most digital-to-time converter (DTC) based applications, apart from maintaining low integral non-linearity (INL), it is also required of the system to achieve a wide frequency translation range. To achieve this performance, we present a…
The voltage received by each customer connected to a power distribution line with local controllers (inverters) is regulated to be within a desired margin through a class of slope-restricted controllers, known conventionally as \emph{droop}…
Large-scale AI training workloads in modern data centers exhibit rapid and periodic power fluctuations, which may induce significant voltage deviations in power distribution systems. Existing voltage regulation methods, such as droop…
A multi-pole, multi-zero design allowed realizing a "true" phase-shifter (not time-delayer) of flat frequency-response over more than 3 decades (30Hz-100kHz), which can be extended to higher frequencies or broader bands thanks to a modular…
This paper describes the Light-Shift Laser-Lock (LSLL) technique, a novel method intended for compact atomic clocks that greatly simplifies the laser setup by stabilizing the pumping-laser frequency to the atoms involved in the clock,…