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Spiking Neural Networks (SNNs) offer a biologically inspired computational paradigm, enabling energy-efficient data processing through spike-based information transmission. Despite notable advancements in hardware for SNNs, spike encoding…

Signal Processing · Electrical Eng. & Systems 2025-06-03 MHD Anas Alsakkal , Runze Wang , Piotr Dudek , Jayawan Wijekoon

The attention mechanism is a key computing kernel of Transformers, calculating pairwise correlations across the entire input sequence. The computing complexity and frequent memory access in computing self-attention put a huge burden on the…

Hardware Architecture · Computer Science 2024-10-31 Ashkan Moradifirouzabadi , Divya Sri Dodla , Mingu Kang

Conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence, because much of the power and energy is consumed by constant data transfers between…

Analog-domain operations offer a promising solution to accelerating signal processing and enabling future multiple-input multiple-output (MIMO) communications with thousands of antennas. In Part I of this paper, we have introduced a…

Information Theory · Computer Science 2025-12-04 Matteo Nerini , Bruno Clerckx

Analog In-Memory Computing (AIMC) offers a promising solution to the von Neumann bottleneck. However, deploying transformer models on AIMC remains challenging due to their inherent need for flexibility and adaptability across diverse tasks.…

Hardware Architecture · Computer Science 2026-03-24 Chen Li , Elena Ferro , Corey Lammie , Manuel Le Gallo , Irem Boybat , Bipin Rajendran

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most existing PIM architectures are either general-purpose but…

Hardware Architecture · Computer Science 2019-07-23 Oscar Castañeda , Maria Bobbett , Alexandra Gallyas-Sanhueza , Christoph Studer

Deep neural network (DNN) inference using reduced integer precision has been shown to achieve significant improvements in memory utilization and compute throughput with little or no accuracy loss compared to full-precision floating-point.…

Hardware Architecture · Computer Science 2023-04-11 Yuzong Chen , Mohamed S. Abdelfattah

Resistive random-access memory (ReRAM) is a promising candidate for the next generation non-volatile memory technology due to its simple read/write operations and high storage density. However, its crossbar array structure causes a severe…

Information Theory · Computer Science 2020-10-26 Guanghui Song , Kui Cai , Xingwei Zhong , Jiang Yu , Jun Cheng

Convolutional neural networks (CNNs) play a key role in deep learning applications. However, the large storage overheads and the substantial computation cost of CNNs are problematic in hardware accelerators. Computing-in-memory (CIM)…

Hardware Architecture · Computer Science 2021-05-26 Syuan-Hao Sie , Jye-Luen Lee , Yi-Ren Chen , Chih-Cheng Lu , Chih-Cheng Hsieh , Meng-Fan Chang , Kea-Tiong Tang

Human beings construct perception of space by integrating sparse observations into massively interconnected synapses and neurons, offering a superior parallelism and efficiency. Replicating this capability in AI finds wide applications in…

Resistive Random Access Memory (ReRAM) based Processing In Memory (PIM) Accelerator has emerged as a promising computing architecture for memory intensive applications, such as Deep Neural Networks (DNNs). However, due to its immaturity,…

Emerging Technologies · Computer Science 2023-12-19 Je-Woo Jang , Thai-Hoang Nguyen , Joon-Sung Yang

This paper presents an in-memory computing (IMC) architecture developed on an 8x8 array of 8T SRAM cells. This architecture enables both multi-bit parallel Multiply-Accumulate (MAC) operations and standard memory processing through…

Hardware Architecture · Computer Science 2025-12-02 Amogh K M , Sunita M S

This paper describes REAP, a software-hardware approach that enables high performance sparse linear algebra computations on a cooperative CPU-FPGA platform. REAP carefully separates the task of organizing the matrix elements from the…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-30 Mohammadreza Soltaniyeh , Richard P. Martin , Santosh Nagarakatte

Processing-in-memory (PIM) has shown extraordinary potential in accelerating neural networks. To evaluate the performance of PIM accelerators, we present an ISA-based simulation framework including a dedicated ISA targeting neural networks…

Hardware Architecture · Computer Science 2024-02-29 Xinyu Wang , Xiaotian Sun , Yinhe Han , Xiaoming Chen

Analog Compute-In-Memory (CIM) architectures promise significant energy efficiency gains for neural network inference, but suffer from complex hardware-induced noise that poses major challenges for deployment. While noise-aware training…

Machine Learning · Computer Science 2025-08-19 Yuannuo Feng , Wenyong Zhou , Yuexi Lyu , Yixiang Zhang , Zhengwu Liu , Ngai Wong , Wang Kang

Compute-in-Memory (CIM) and weight sparsity are two effective techniques to reduce data movement during Neural Network (NN) inference. However, they can hardly be employed in the same accelerator simultaneously because CIM requires…

Hardware Architecture · Computer Science 2025-11-19 Weiping Yang , Shilin Zhou , Hui Xu , Yujiao Nie , Qimin Zhou , Zhiwei Li , Changlin Chen

Efficient hardware implementation of nonlinear activation functions is a crucial task in deploying artificial neural networks on resource-constrained and edge devices such as Field-Programmable Gate Arrays (FPGAs). The sigmoid activation…

Hardware Architecture · Computer Science 2026-04-28 Chintan Panchal , Ankur Changela , Mohendra Roy

Resistive Random-Access-Memory (ReRAM) crossbar is a promising technique for deep neural network (DNN) accelerators, thanks to its in-memory and in-situ analog computing abilities for Vector-Matrix Multiplication-and-Accumulations (VMMs).…

Hardware Architecture · Computer Science 2021-03-03 Fangxin Liu , Wenbo Zhao , Yilong Zhao , Zongwu Wang , Tao Yang , Zhezhi He , Naifeng Jing , Xiaoyao Liang , Li Jiang

This work discusses memory-immersed collaborative digitization among compute-in-memory (CiM) arrays to minimize the area overheads of a conventional analog-to-digital converter (ADC) for deep learning inference. Thereby, using the proposed…

Hardware Architecture · Computer Science 2023-07-11 Shamma Nasrin , Maeesha Binte Hashem , Nastaran Darabi , Benjamin Parpillon , Farah Fahim , Wilfred Gomes , Amit Ranjan Trivedi

High-quality, multi-channel neural recording is indispensable for neuroscience research and clinical applications. Large-scale brain recordings often produce vast amounts of data that must be wirelessly transmitted for subsequent offline…

Hardware Architecture · Computer Science 2025-09-03 Adithya Krishna , Sohan Debnath , Madhuvanthi Srivatsav , André van Schaik , Mahesh Mehendale , Chetan Singh Thakur
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