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Accelerators for sparse matrix multiplication are important components in emerging systems. In this paper, we study the main challenges of accelerating Sparse Matrix Multiplication (SpMM). For the situations that data is not stored in the…

Hardware Architecture · Computer Science 2019-06-04 Pareesa Ameneh Golnari , Sharad Malik

Multimodal foundation models are transformative in sequential recommender systems, leveraging powerful representation learning capabilities. While Parameter-efficient Fine-tuning (PEFT) is commonly used to adapt foundation models for…

Information Retrieval · Computer Science 2024-07-23 Junchen Fu , Xuri Ge , Xin Xin , Alexandros Karatzoglou , Ioannis Arapakis , Jie Wang , Joemon M. Jose

One major technical challenge for modern analytical database systems is how to leverage GPU to exploit their massive parallelism and high bandwidth. Yet, existing GPU-driven database engines suffer from inefficiencies caused by frequent…

Databases · Computer Science 2026-05-12 Tsuyoshi Ozawa , Kazuo Goda

Large language models (LLMs) are popular around the world due to their powerful understanding capabilities. As the core component of LLMs, accelerating Transformer through parallelization has gradually become a hot research topic. Mask…

Machine Learning · Computer Science 2026-05-29 Wenhao Dai , Haodong Deng , Mengfei Rong , Xinyu Yang , Hongyu Liu , Fangxin Liu , Hailong Yang , Qianwen Cao , Qingxiao Sun

This paper introduces the first low-power hardware accelerator for Spiking Transformers, an emerging alternative to traditional artificial neural networks. By modifying the base Spikformer model to use IAND instead of residual addition, the…

Hardware Architecture · Computer Science 2025-03-26 Bo-Yu Chen , Tian-Sheuan Chang

The ever-increasing quest for data-level parallelism and variable precision in ubiquitous multimedia and Deep Neural Network (DNN) applications has motivated the use of Single Instruction, Multiple Data (SIMD) architectures. To alleviate…

Hardware Architecture · Computer Science 2020-11-03 Zahra Ebrahimi , Salim Ullah , Akash Kumar

Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used…

Artificial Intelligence · Computer Science 2024-03-06 Mahdi Taheri , Masoud Daneshtalab , Jaan Raik , Maksim Jenihhin , Salvatore Pappalardo , Paul Jimenez , Bastien Deveautour , Alberto Bosio

As the landscape of deep neural networks evolves, heterogeneous dataflow accelerators, in the form of multi-core architectures or chiplet-based designs, promise more flexibility and higher inference performance through scalability. So far,…

Hardware Architecture · Computer Science 2025-10-08 Arne Symons , Linyan Mei , Steven Colleman , Pouya Houshmand , Sebastian Karl , Marian Verhelst

Addressing the resource waste caused by fixed computation paradigms in deep learning models under dynamic scenarios, this paper proposes a Transformer$^{-1}$ architecture based on the principle of deep adaptivity. This architecture achieves…

Machine Learning · Computer Science 2025-01-29 Lumen AI , Tengzhou No. 1 Middle School , Shihao Ji , Zihui Song , Fucheng Zhong , Jisen Jia , Zhaobo Wu , Zheyi Cao , Xu Tianhao

The rapid adoption of large language models (LLMs) has shifted a substantial portion of inference workloads into throughput-oriented offline regimes, where fully utilizing GPU compute requires large batch sizes. However, existing…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-28 Alan Zhao , Cyril Y. He

In addition to hardware wall-time restrictions commonly seen in high-performance computing systems, it is likely that future systems will also be constrained by energy budgets. In the present work, finite difference algorithms of varying…

Mathematical Software · Computer Science 2017-09-29 Satya P. Jammy , Christian T. Jacobs , David J. Lusher , Neil D. Sandham

The deployment of deep neural networks (DNNs) on compute-in-memory (CiM) accelerators offers significant energy savings and speed-up by reducing data movement during inference. However, the reliability of CiM-based systems is challenged by…

Hardware Architecture · Computer Science 2025-12-23 Akul Malhotra , Sumeet Kumar Gupta

Progress in machine learning (ML) has been fueled by scaling neural network models. This scaling has been enabled by ever more heroic feats of engineering, necessary for accommodating ML approaches that require high bandwidth communication…

A low-latency and energy-efficient tensor algebra accelerator design must optimize how data movement and operations are scheduled (i.e., mapped) in the accelerator architecture. A key mapping optimization is fusion, meaning holding data…

Hardware Architecture · Computer Science 2026-05-05 Tanner Andrulis , Michael Gilbert , Vivienne Sze , Joel S. Emer

Energy system optimization models are increasing in scope and resolution, yielding large and challenging linear programs. For a long time, the standard way to address such problems has relied on shared-memory interior-point methods (IPM),…

Optimization and Control · Mathematics 2026-05-07 Janina Zittel , Annika Buchholz , Michael Bussieck , Frederik Fiand , Thorsten Koch , Lukas Mehl , Niels Lindner , Manuel Wetzel

In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the escalating computational and memory demands of deep…

Hardware Architecture · Computer Science 2025-05-20 Michael Wu , Arnab Raha , Deepak A. Mathaikutty , Martin Langhammer , Engin Tunali , Daksha Sharma

The emergence of diffusion models has significantly advanced generative AI, improving the quality, realism, and creativity of image and video generation. Among them, Stable Diffusion (StableDiff) stands out as a key model for text-to-image…

Hardware Architecture · Computer Science 2025-07-03 Zhican Wang , Guanghui He , Hongxiang Fan

Large-scale timers are ubiquitous in network processing, including flow table entry expiration control in software defined network (SDN) switches, MAC address aging in Ethernet bridges, and retransmission timeout management in TCP/IP…

Networking and Internet Architecture · Computer Science 2025-08-15 Zekun Wang , Binghao Yue , Weitao Pan , Jiangyi Shi , Yue Hao

Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). Exploiting data sparsity is a common approach to further accelerate GEMM…

Hardware Architecture · Computer Science 2020-10-14 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Topology optimization (TO) is a popular and powerful computational approach for designing novel structures, materials, and devices. Two computational challenges have limited the applicability of TO to a variety of industrial applications.…

Computational Engineering, Finance, and Science · Computer Science 2020-12-01 Sirui Bi , Jiaxin Zhang , Guannan Zhang