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LLM watermarks must be detectable without compromising text quality, yet most existing schemes bias the next-token distribution and pay for detection with measurable quality loss. We present SLAM (Structural Linguistic Activation Marking),…

Computation and Language · Computer Science 2026-05-12 Fabrice Harel-Canada , Amit Sahai

Resistive switching devices and other components with negative differential resistance (NDR) are emerging as possible electronic constituents of next-generation computing architectures. Due to the NDR effects exhibited, switching operations…

Instrumentation and Detectors · Physics 2024-06-19 T. Hennen , E. Wichmann , R. Waser , D. J. Wouters , D. Bedau

Write disturbance error (WDE) appears as a serious reliability problem preventing phase-change memory (PCM) from general commercialization, and therefore several studies have been proposed to mitigate WDEs. Verify-and-correction (VnC)…

Hardware Architecture · Computer Science 2022-08-10 Hyokeun Lee , Seungyong Lee , Byeongki Song , Moonsoo Kim , Seokbo Shim , Hyuk-Jae Lee , Hyun Kim

Conventional 6T SRAM is used in microprocessors in the cache memory design. The basic 6T SRAM cell and a 6 bit memory array layout are designed in LEdit. The design and analysis of key SRAM components, sense amplifiers, decoders, write…

Systems and Control · Electrical Eng. & Systems 2025-08-14 Justin London

As an emerging non-volatile memory (NVM) technology, spin-torque transfer magnetic random access memory (STT-MRAM) has received great attention in recent years since it combines the features of low switching energy, fast write/read speed,…

Information Theory · Computer Science 2024-10-08 Xingwei Zhong , Kui Cai , Guanghui Song

SRAM-based cache memory faces several scalability limitations in deep nanoscale technologies, e.g., high leakage current, low cell stability, and low density. Emerging Non-Volatile Memory (NVM) technologies have received lots of attention…

Emerging Technologies · Computer Science 2025-12-02 Elham Cheshmikhani , Fateme Shokouhinia , Hamed Farbeh

The aggressive scaling of technology may have helped to meet the growing demand for higher memory capacity and density, but has also made DRAM cells more prone to errors. Such a reality triggered a lot of interest in modeling DRAM behavior…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-30 Lev Mukhanov , Konstantinos Tovletoglou , Hans Vandierendonck , Dimitrios S. Nikolopoulos , Georgios Karakonstantis

Compute-in-memory (CiM) architectures promise significant improvements in energy efficiency and throughput for deep neural network acceleration by alleviating the von Neumann bottleneck. However, their reliance on emerging non-volatile…

Machine Learning · Computer Science 2026-03-05 Yifan Qin , Jiahao Zheng , Zheyu Yan , Wujie Wen , Xiaobo Sharon Hu , Yiyu Shi

Neuromorphic architectures built with Non-Volatile Memory (NVM) can significantly improve the energy efficiency of machine learning tasks designed with Spiking Neural Networks (SNNs). A major source of voltage drop in a crossbar of these…

Neural and Evolutionary Computing · Computer Science 2020-09-29 Twisha Titirsha , Anup Das

Spin-Transfer Torque Magnetic RAM (STT-MRAM) is known as the most promising replacement for SRAM technology in large Last-Level Caches (LLCs). Despite its high-density, non-volatility, near-zero leakage power, and immunity to radiation as…

Hardware Architecture · Computer Science 2022-01-11 Elham Cheshmikhani , Hamed Farbeh , Hossein Asadi

In order to meet the needs of high performance computing (HPC) in terms of large memory, high throughput and energy savings, the non-volatile memory (NVM) has been widely studied due to its salient features of high density, near-zero…

Hardware Architecture · Computer Science 2019-05-09 Jianming Huang , Yu Hua , Pengfei Zuo , Wen Zhou , Fangting Huang

This paper summarizes our work on experimentally characterizing, mitigating, and recovering read disturb errors in multi-level cell (MLC) NAND flash memory, which was published in DSN 2015, and examines the work's significance and future…

Hardware Architecture · Computer Science 2018-05-10 Yu Cai , Yixin Luo , Saugata Ghose , Erich F. Haratsch , Ken Mai , Onur Mutlu

The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…

Magnetic random-access memory (MRAM) is a promising memory technology due to its high density, non-volatility, and high endurance. However, achieving high memory fidelity incurs significant write-energy costs, which should be reduced for…

Information Theory · Computer Science 2020-09-22 Yongjune Kim , Yoocharn Jeon , Cyril Guyot , Yuval Cassuto

DRAM is the primary technology used for main memory in modern systems. Unfortunately, as DRAM scales down to smaller technology nodes, it faces key challenges in both data integrity and latency, which strongly affect overall system…

Hardware Architecture · Computer Science 2023-03-15 Hasan Hassan

This dissertation rigorously characterizes many modern commodity DRAM devices and shows that by exploiting DRAM access timing margins within manufacturer-recommended DRAM timing specifications, we can significantly improve system…

Hardware Architecture · Computer Science 2021-09-30 Jeremie S. Kim

Stochastic behaviors of resistive random access memory (RRAM) play an important role in the design of cross-point memory arrays. A Monte Carlo compact model of oxide RRAM is developed and calibrated with experiments on various device stack…

Emerging Technologies · Computer Science 2019-07-19 Haitong Li , Peng Huang , Bin Gao , Xiaoyan Liu , Jinfeng Kang , H. -S. Philip Wong

Non-volatile memory, such as resistive RAM (RRAM), is an emerging energy-efficient storage, especially for low-power machine learning models on the edge. It is reported, however, that the bit error rate of RRAMs can be up to 3.3% in the…

Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used for breaking memory isolation, a fundamental building block for building robust systems. RowHammer and RowPress are two examples of read disturbance in…

In recent years, due to the spread of multi-level non-volatile memories (NVM), $q$-ary write-once memories (WOM) codes have been extensively studied. By using WOM codes, it is possible to rewrite NVMs $t$ times before erasing the cells. The…

Information Theory · Computer Science 2016-05-18 Evyatar Hemo , Yuval Cassuto