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Transformer-based diffusion models offer superior scalability and performance but suffer from high computational overhead due to the iterative nature and quadratic complexity of self-attention at high resolutions. In this paper, we propose…

Hardware Architecture · Computer Science 2026-05-26 Jieon Yoon , Hangyeol Lee , Jaehoon Heo , Joo-Young Kim

Parallel programmers face the often irreconcilable goals of programmability and performance. HPC systems use distributed memory for scalability, thereby sacrificing the programmability advantages of shared memory programming models.…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-01-21 Bharath Ramesh , Calvin J. Ribbens , Srinidhi Varadarajan

Aggregated HPC resources have rigid allocation systems and programming models which struggle to adapt to diverse and changing workloads. Consequently, HPC systems fail to efficiently use the large pools of unused memory and increase the…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-29 Marcin Copik , Marcin Chrapek , Larissa Schmid , Alexandru Calotoiu , Torsten Hoefler

Experience shows that on today's high performance systems the utilization of different acceleration cards in conjunction with a high utilization of all other parts of the system is difficult. Future architectures, like exascale clusters,…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-03-07 Patrick Diehl , Madhavan Seshadri , Thomas Heller , Hartmut Kaiser

The continued growth in the processing power of FPGAs coupled with high bandwidth memories (HBM), makes systems like the Xilinx U280 credible platforms for linear solvers which often dominate the run time of scientific and engineering…

Hardware Architecture · Computer Science 2023-01-02 Linghao Song , Licheng Guo , Suhail Basalama , Yuze Chi , Robert F. Lucas , Jason Cong

Matrix extensions have emerged as an essential feature in modern CPUs to address the surging demands of AI workloads. However, existing designs often incur substantial hardware and software design overhead. Tight coupling with the CPU…

Hardware Architecture · Computer Science 2026-04-14 Jinpeng Ye , Chongxi Wang , Wenqing Li , Bin Yuan , Shiyi Wang , Fenglu Zhang , Junyu Yue , Jianan Xie , Yunhao Ye , Haoyu Deng , Yingkun Zhou , Xin Cheng , Fuxin Zhang , Jian Wang

Although modern, AI-centric datacenters heavily rely on SmartNICs, existing devices impose a hard trade-off. Commercial SmartNICs provide high bandwidth and easy software integration, but offer limited support for customization and data…

Hardware Architecture · Computer Science 2026-04-17 Benjamin Ramhorst , Maximilian Jakob Heer , Luhao Liu , Heejae Kim , Jonas Dann , Jin-Soo Kim , Gustavo Alonso

Intensive computation is entering data centers with multiple workloads of deep learning. To balance the compute efficiency, performance, and total cost of ownership (TCO), the use of a field-programmable gate array (FPGA) with…

Computer Vision and Pattern Recognition · Computer Science 2019-09-19 Xiaoyu Yu , Yuwei Wang , Jie Miao , Ephrem Wu , Heng Zhang , Yu Meng , Bo Zhang , Biao Min , Dewei Chen , Jianlin Gao

Resource-limited robots face significant challenges in executing computationally intensive tasks, such as locomotion and manipulation, particularly for real-time optimal control algorithms like Model Predictive Control (MPC). This paper…

Achieving maximum possible rate of inferencing with minimum hardware resources plays a major role in reducing enterprise operational costs. In this paper we explore use of PCIe streaming on FPGA based platforms to achieve high throughput.…

Performance · Computer Science 2021-10-25 Piyush Manavar , Manoj Nambiar , Nupur Sumeet , Rekha Singhal , Sharod Choudhary , Amey Pandit

Real-time systems, particularly those used in domains like automated driving, are increasingly adopting neural networks. From this trend arises the need for high-performance hardware exhibiting predictable timing behavior. While…

Hardware Architecture · Computer Science 2026-02-26 Maximilian Kirschner , Konstantin Dudzik , Ben Krusekamp , Jürgen Becker

Optimization-based controllers, such as Model Predictive Control (MPC), have attracted significant research interest due to their intuitive concept, constraint handling capabilities, and natural application to multi-input multi-output…

Systems and Control · Electrical Eng. & Systems 2024-10-24 S. A. N. Nouwens , M. M. Paulides , W. P. M. H. Heemels

FPGAs are now ubiquitous in cloud computing infrastructures and reconfigurable system-on-chip, particularly for AI acceleration. Major cloud service providers such as Amazon and Microsoft are increasingly incorporating FPGAs for specialized…

Cryptography and Security · Computer Science 2024-10-23 Jayeeta Chaudhuri , Hassan Nassar , Dennis R. E. Gnad , Jorg Henkel , Mehdi B. Tahoori , Krishnendu Chakrabarty

This paper is focused on improving multi-GPU performance of a research CFD code on structured grids. MPI and OpenACC directives are used to scale the code up to 16 GPUs. This paper shows that using 16 P100 GPUs and 16 V100 GPUs can be…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-06-10 Weicheng Xue , Charles W. Jackson , Christoper J. Roy

In recent years the computational capacity of single Field Programmable Gate Arrays (FPGA) devices as well as their versatility has increased significantly. Adding to that the High Level Synthesis frameworks allowing to program such…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-22 G. Korcyl , P. Korcyl

The almost unlimited possibilities to customize the logic in an FPGA are one of the main reasons for the versatility of these devices. Partial reconfiguration exploits this capability even further by allowing to replace logic in predefined…

Instrumentation and Detectors · Physics 2024-08-19 Marvin Fuchs , Hendrik Krause , Timo Muscheid , Lukas Scheller , Luis E. Ardila-Perez , Oliver Sander

The increasing use of hardware processing accelerators tailored for specific applications, such as the Vision Processing Unit (VPU) for image recognition, further increases developers' configuration, development, and management overhead.…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-08 Sebastian Werner , Trever Schirmer

The field of edge computing has witnessed remarkable growth owing to the increasing demand for real-time processing of data in applications. However, challenges persist due to limitations in performance and power consumption. To overcome…

Hardware Architecture · Computer Science 2024-03-11 Simone Machetti , Pasquale Davide Schiavone , Thomas Christoph Müller , Miguel Peón-Quirós , David Atienza

When working at exascale, the various constraints imposed by the extreme scale of the system bring new challenges for application users and software/middleware developers. In that context, and to provide best performance, resiliency and…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-10-09 Jerome Soumagne , Philip H. Carns , Dries Kimpe , Quincey Koziol , Robert B. Ross

Our ISCA 2015 paper provides a new programmable processing-in-memory (PIM) architecture and system design that can accelerate key data-intensive applications, with a focus on graph processing workloads. Our major idea was to completely…

Hardware Architecture · Computer Science 2023-06-28 Junwhan Ahn , Sungpack Hong , Sungjoo Yoo , Onur Mutlu , Kiyoung Choi