Related papers: Optimized Cryo-CMOS Technology with VTH<0.2V and I…
We demonstrate an optimized fabrication process for electric field (voltage gate) controlled nano-constriction spin Hall nano-oscillators (SHNOs), achieving feature sizes of <30 nm with easy to handle ma-N 2401 e-beam lithography negative…
Cryogenic operation in conjunction with new test-mass materials promises to reduce the sensitivity limitations from thermal noise in gravitational-wave detectors. The currently most advanced materials under discussion are crystalline…
To achieve high performance thermoelectric materials and devices, thermoelectric transistors, which integrate thermoelectric effects with transistor technology, represent a promising approach. Here p type Bi0.5Sb1.5Te3 and n type…
A thermal heat switch has been developed intended for cryogenic space applications operating around 100 K. The switch was designed to separate two pulse tube cold heads that cool a common focal plane array. Two cold heads are used for…
We report on the experimental study made on a successive prototype of High-Voltage CMOS (HV-CMOS) ATLASPix2 sensor for the tracking detector application, developed with 180 nm feature size. These sensors are to qualify mainly the peripheral…
We present a realisation of high bandwidth instrumentation at cryogenic temperatures and for dilution refrigerator operation that possesses advantages over methods using radio-frequency single electron transistor or transimpedance…
The CLARO-CMOS is an application specific integrated circuit (ASIC) designed for fast photon counting with pixellated photodetectors such as multi-anode photomultiplier tubes (Ma-PMT), micro-channel plates (MCP), and silicon…
Current state-of-the-art superconducting microwave qubits are cooled to extremely low temperatures to avoid sources of decoherence. Higher qubit operating temperatures would significantly increase the cooling power available, which is…
In this paper a new design of MMIC based LNA is outlined. This design uses a discrete 100-nm InP HEMT placed in front of an existing InP MMIC LNA to lower the overall noise temperature of the LNA. This new approach known as the Transistor…
Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the…
Researchers from Intel Corporation recently proposed "Magneto-Electric Spin Orbit (MESO)" logic as a new strategy for beyond-CMOS electronics [1]. The Intel researchers project that this concept has the potential to reduce the switching…
Heat capacity measurements under high pressure places high demands on the calorimeter. Here we describe the development of a miniaturized nanocalorimeter for high-pressure heat capacity measurements at low temperature. The device,…
Quantum technologies offer unprecedented capabilities in computation and secure information transfer. Their implementation requires qubits to operate at cryogenic temperatures (CT) while control and readout electronics typically still…
The state-of-the-art CMOS technology has started to adopt three-dimensional (3D) integration approaches, enabling continuous chip density increment and performance improvement, while alleviating difficulties encountered in traditional…
A system providing an optical frequency with an instability comparable to that of a hydrogen maser is presented. It consists of a $5$ $\mathrm{cm}$ long, vertically oriented silicon optical resonator operated at temperatures between $1.5$…
On-silicon inductors using a bulk 0.18 {\mu}m CMOS process have been designed. By shunting different metal layers in parallel, inductor values and quality factors were simulated. Selected inductors were then employed in two open-loop buck…
Ferroelectric-based capacitive crossbar arrays have been proposed for energy-efficient in-memory computing in the charge domain. They combat the challenges like sneak paths and high static power faced by resistive crossbar arrays but are…
Machine learning algorithms have been proven effective for essential quantum computation tasks such as quantum error correction and quantum control. Efficient hardware implementation of these algorithms at cryogenic temperatures is…
One of the daunting challenges in modern low temperature scanning tunneling microscopy (STM) is the difficulty of combining atomic resolution with cryogen free cooling. Further functionality needs, such as ultra-high vacuum (UHV), high…
We report experimental demonstration of the feasibility of reaching temperatures below 1 mK using cryogen-free technology. Our prototype system comprises an adiabatic nuclear demagnetisation stage, based on hyperfine-enhanced nuclear…