Related papers: The Continuous-Time RC-Chain ADC

This paper considers uplink massive multiple-input multiple-output (MIMO) systems with lowresolution analog-to-digital converters (ADCs) over Rician fading channels. Maximum-ratio-combining (MRC) and zero-forcing (ZF) receivers are…

This paper investigates a hardware-efficient massive multiple-input multiple-output integrated sensing and communication (MIMO-ISAC) system with 1-bit analog-to-digital converters (ADCs)/digital-to-analog converters (DACs). The proposed…

In this paper, we propose a novel semantic digital analog converter (sDAC) for the compatibility of semantic communications and digital communications. Most of the current semantic communication systems are based on the analog modulations,…

Transistor-level simulation plays a vital role in validating the physical correctness of integrated circuits. However, such simulations are computationally expensive. This paper proposes three novel reduction methods specifically tailored…

In this paper, an adaptive nonlinear controller is designed for a parallel DC-DC converter system that feeds an unknown ZIP load, characterized by constant impedance (Z), constant current (I), and constant power (P), at the DC bus. The…

We aim at investigating the impact of low resolution digital-to-analog converters (DACs) at the transmitter and low resolution analog-to-digital converters (ADCs) at the receiver on the required bandwidth and the required signalto- noise…

In this paper, we implement a low-latency rapid-prototyping platform for signal processing based on software-defined radios (SDRs) and off-the-shelf PC hardware. This platform allows to evaluate a wide variety of algorithms in real-time…

Dynamics and stability of average current control of DC-DC converters are analyzed by sampled-data modeling. Orbital stability is studied and it is found unrelated to the ripple size of the orbit. Compared with the averaged modeling, the…

This paper describes the architecture of first and second generation current conveyor (CCI and CCII respectively) and designing an amplifier using second generation current conveyor. The designed amplifier through CCII+ can be used in…

Superconducting quantum computers (SQC) can solve some specific problems which are deeply believed to be intractable for classical computers. The control and measurement of qubits can't go on without the synchronous operation of…

Reduction of comparison cycles leads to power savings of a successive-approximation-register (SAR) analog-to-digital converters (ADC). We establish that the lowest average number of comparison cycles of a SAR ADC approaches the entropy of…

When a quantizer input signal is the sum of the desired signal and input white noise, the quantization error is a function of total input signal. Our new equivalent model splits the quantization error into two components: a non-linear…

Scalability and modularity are key features for future power converters, such that these systems can be easily employed in many applications with different electrical specifications. In this thesis, the potential of a new bidirectional…

In this technical note, we provide a comparison of the design metrics of various quasi-delay-insensitive (QDI) asynchronous adders, where the adders correspond to diverse architectures. QDI adders are robust, and the objective of this…

In this paper we present a novel high-resolution multi-channel FPGA-based time-to-digital converter (TDC). We designed and implemented a complex electronic circuit on the FPGA, whose overall accuracy is several orders of magnitude greater…

This paper investigates the design of analog beamforming at the receiver in millimeter-wave (mmWave) multiple-input multiple-output (MIMO) systems, aided by full digital chains featuring 1-bit ADCs. We advocate utilizing these full digital…

This paper focuses on channel estimation for mmWave MIMO systems with 1-bit spatial sigma-delta analog-to-digital converters (ADCs). The channel estimation performance with 1-bit spatial sigma-delta ADCs depends on the quantization noise…

Low Level RF (LLRF) control systems of linear accelerators (LINACs) are typically implemented with heterodyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Frequency System-on-Chip…

Audio captioning aims to automatically generate a natural language description of an audio clip. Most captioning models follow an encoder-decoder architecture, where the decoder predicts words based on the audio features extracted by the…

The paper presents the design and measurement results of a transient waveform recording ASIC based on the Switched Capacitor Array (SCA) architecture. This 0.18 {\mu}m CMOS prototype device contains two channels and each channel employs a…