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We formalize synthesis of shared control protocols with correctness guarantees for temporal logic specifications. More specifically, we introduce a modeling formalism in which both a human and an autonomy protocol can issue commands to a…

Robotics · Computer Science 2016-10-28 Nils Jansen , Murat Cubuktepe , Ufuk Topcu

The rapid advancement of AI workloads and domain-specific architectures has led to increasingly diverse processor microarchitectures, whose design exploration requires fast and accurate performance validation. However, traditional workflows…

Hardware Architecture · Computer Science 2026-05-22 Chengzhen Meng , Xiuzhuang Chen , Bingcai Sui , Zhenyu Zhao , Tun Li , Hongjun Dai

This paper focuses on automated synthesis of divide-and-conquer parallelism, which is a common parallel programming skeleton supported by many cross-platform multithreaded libraries. The challenges of producing (manually or automatically) a…

Programming Languages · Computer Science 2017-01-31 Azadeh Farzan , Victor Nicolet

Automatic synthesis from temporal logic specifications is an attractive alternative to manual system design, due to its ability to generate correct-by-construction implementations from high-level specifications. Due to the high complexity…

Logic in Computer Science · Computer Science 2023-01-25 Philippe Heim , Rayna Dimitrova

Basic Linear Algebra Subprograms (BLAS) are a set of low level linear algebra kernels widely adopted by applications involved with the deep learning and scientific computing. The massive and economic computing power brought forth by the…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-10-20 Linnan Wang , Wei Wu , Jianxiong Xiao , Yi Yang

Due to their simplicity and excellent performance, parallel asynchronous variants of stochastic gradient descent have become popular methods to solve a wide range of large-scale optimization problems on multi-core architectures. Yet,…

Optimization and Control · Mathematics 2017-11-07 Fabian Pedregosa , Rémi Leblond , Simon Lacoste-Julien

A single-cycle processor completes the execution of an instruction in only one clock cycle. However, its clock period is usually rather long. On the contrary, although clock frequency is higher in a multi-cycle processor, it takes several…

Hardware Architecture · Computer Science 2019-03-04 Ahmad Ahmadi , Reza Faghih Mirzaee

Sharpness-aware minimization (SAM) has been shown to improve the generalization of neural networks. However, each SAM update requires \emph{sequentially} computing two gradients, effectively doubling the per-iteration cost compared to base…

Machine Learning · Computer Science 2024-10-15 Wanyun Xie , Thomas Pethick , Volkan Cevher

Scaling data volume and diversity is critical for generalizing embodied intelligence. While synthetic data generation offers a scalable alternative to expensive physical data acquisition, existing pipelines remain fragmented and…

We propose a new algorithm for Promise Constraint Satisfaction Problems PCSPs). It is a combination of the $\textbf{C}$onstraint Basic $\textbf{L}$P relaxation and the $\textbf{A}$ffine I$\textbf{P}$ relaxation (CLAP). We give a…

Computational Complexity · Computer Science 2023-01-31 Lorenzo Ciardo , Stanislav Živný

High-level synthesis (HLS) has received significant attention in recent years, improving programmability for FPGAs. PolyMage is a domain-specific language (DSL) for image processing pipelines that also has a HLS backend to translate the…

Hardware Architecture · Computer Science 2018-12-20 Vinamra Benara , Ziaul Choudhury , Suresh Purini , Uday Bondhugula

Compiling high-level programs to target high-speed packet-processing pipelines is a challenging combinatorial optimization problem. The compiler must configure the pipeline's resources to match the high-level semantics of the program, while…

Networking and Internet Architecture · Computer Science 2022-11-22 Xiangyu Gao , Divya Raghunathan , Ruijie Fang , Tao Wang , Xiaotong Zhu , Anirudh Sivaraman , Srinivas Narayana , Aarti Gupta

Compiling programs to an instruction set architecture (ISA) requires a set of rewrite rules that map patterns consisting of compiler instructions to patterns consisting of ISA instructions. We synthesize such rules by constructing SMT…

Logic in Computer Science · Computer Science 2024-05-21 Ross Daly , Caleb Donovick , Caleb Terrill , Jackson Melchert , Priyanka Raina , Clark Barrett , Pat Hanrahan

High-Level Synthesis enables the rapid prototyping of hardware accelerators, by combining a high-level description of the functional behavior of a kernel with a set of micro-architecture optimizations as inputs. Such optimizations can be…

Hardware Architecture · Computer Science 2025-02-11 Stéphane Pouget , Louis-Noël Pouchet , Jason Cong

Digital Computing-in-Memory (DCIM) is an innovative technology that integrates multiply-accumulation (MAC) logic directly into memory arrays to enhance the performance of modern AI computing. However, the need for customized memory cells…

The unrealizability of a specification is often due to the assumption that the behavior of the environment is unrestricted. In this paper, we present algorithms for synthesis in bounded environments, where the environment can only generate…

Logic in Computer Science · Computer Science 2021-01-01 Rayna Dimitrova , Bernd Finkbeiner , Hazem Torfah

In syntax-guided synthesis (SyGuS), a synthesizer's goal is to automatically generate a program belonging to a grammar of possible implementations that meets a logical specification. We investigate a common limitation across…

Programming Languages · Computer Science 2019-06-11 Saswat Padhi , Todd Millstein , Aditya Nori , Rahul Sharma

Synthesis is a particularly challenging problem for concurrent programs. At the same time it is a very promising approach, since concurrent programs are difficult to get right, or to analyze with traditional verification techniques. This…

Formal Languages and Automata Theory · Computer Science 2015-06-09 Anca Muscholl

In this work, we introduce a Self-Aware Polymorphic Architecture (SAPA) design approach to support emerging context-aware applications and mitigate the programming challenges caused by the ever-increasing complexity and heterogeneity of…

Hardware Architecture · Computer Science 2018-02-15 Michel A. Kinsy , Mihailo Isakov , Alan Ehret , Donato Kava

MultiPaxos, while a fundamental Replicated State Machine algorithm, suffers from a dearth of comprehensive guidelines for achieving a complete and correct implementation. This deficiency has hindered MultiPaxos' practical utility and…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-05-21 Zhiying Liang , Vahab Jabrayilov , Aleksey Charapko , Abutalib Aghayev