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Sparse matrix multiplication is an important component of linear algebra computations. In this paper, an architecture based on Content Addressable Memory (CAM) and Resistive Content Addressable Memory (ReCAM) is proposed for accelerating…

Hardware Architecture · Computer Science 2017-05-30 Leonid Yavits , Ran Ginosar

Compute-in-memory (CiM) is a promising approach to improving the computing speed and energy efficiency in dataintensive applications. Beyond existing CiM techniques of bitwise logic-in-memory operations and dot product operations, this…

Hardware Architecture · Computer Science 2023-01-03 Yiming Chen , Yushen Fu , Mingyen Lee , Sumitha George , Yongpan Liu , Vijaykrishnan Narayanan , Huazhong Yang , Xueqing Li

Resistive random-access memory (RRAM) is gaining popularity due to its ability to offer computing within the memory and its non-volatile nature. The unique properties of RRAM, such as binary switching, multi-state switching, and device…

Emerging Technologies · Computer Science 2024-07-08 Simranjeet Singh , Farhad Merchant , Sachin Patkar

Convolutional neural networks (CNNs) demonstrate promising accuracy in a wide range of applications. Among all layers in CNNs, convolution layers are the most computation-intensive and consume the most energy. As the maturity of device and…

Hardware Architecture · Computer Science 2020-04-02 Sho Ko , Yun Joon Soh , Jishen Zhao

Recent works demonstrated the promise of using resistive random access memory (ReRAM) as an emerging technology to perform inherently parallel analog domain in-situ matrix-vector multiplication -- the intensive and key computation in DNNs.…

Hardware Architecture · Computer Science 2021-06-18 Geng Yuan , Payman Behnam , Zhengang Li , Ali Shafiee , Sheng Lin , Xiaolong Ma , Hang Liu , Xuehai Qian , Mahdi Nazm Bojnordi , Yanzhi Wang , Caiwen Ding

There is a growing interest in portable MRI (pMRI) systems for point-of-care imaging, particularly in remote or resource-constrained environments. However, the computational complexity of pMRI, especially in image reconstruction and machine…

Hardware Architecture · Computer Science 2025-09-09 Omar Al Habsi , Safa Mohammed Sali , Anis Meribout , Mahmoud Meribout , Saif Almazrouei , Mohamed Seghier

This paper presents GRAPHR, the first ReRAM-based graph processing accelerator. GRAPHR follows the principle of near-data processing and explores the opportunity of performing massive parallel analog operations with low hardware and energy…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-12-12 Linghao Song , Youwei Zhuo , Xuehai Qian , Hai Li , Yiran Chen

Modern Artificial Intelligence (AI) applications are increasingly utilizing multi-tenant deep neural networks (DNNs), which lead to a significant rise in computing complexity and the need for computing parallelism. ReRAM-based…

Emerging Technologies · Computer Science 2024-08-12 Bojing Li , Duo Zhong , Xiang Chen , Chenchen Liu

Deep Neural Networks (DNNs) and Large Language Models (LLMs) have revolutionized artificial intelligence, yet their deployment faces significant memory and computational challenges, especially in resource-constrained environments.…

Hardware Architecture · Computer Science 2025-04-24 Cong Guo , Chiyue Wei , Jiaming Tang , Bowen Duan , Song Han , Hai Li , Yiran Chen

The wide adoption of deep neural networks has been accompanied by ever-increasing energy and performance demands due to the expensive nature of training them. Numerous special-purpose architectures have been proposed to accelerate training:…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-30 Aayush Ankit , Izzat El Hajj , Sai Rahul Chalamalasetti , Sapan Agarwal , Matthew Marinella , Martin Foltin , John Paul Strachan , Dejan Milojicic , Wen-mei Hwu , Kaushik Roy

Resistive random access memory (ReRAM)-based processing-in-memory (PIM) architectures have demonstrated great potential to accelerate Deep Neural Network (DNN) training/inference. However, the computational accuracy of analog PIM is…

The primary operation in DNNs is the dot product of quantized input activations and weights. Prior works have proposed the design of memory-centric architectures based on the Processing-In-Memory (PIM) paradigm. Resistive RAM (ReRAM)…

Hardware Architecture · Computer Science 2023-06-29 Mohammad Sabri , Marc Riera , Antonio González

Coarse-Grained Reconfigurable Arrays (CGRAs) are specialized accelerators commonly employed to boost performance in workloads with iterative structures. Existing research typically focuses on compiler or architecture optimizations aimed at…

Hardware Architecture · Computer Science 2025-08-28 Xiangfeng Liu , Zhe Jiang , Anzhen Zhu , Xiaomeng Han , Mingsong Lyu , Qingxu Deng , Nan Guan

Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing.…

Hardware Architecture · Computer Science 2023-10-18 Linghao Song , Fan Chen , Xuehai Qian , Hai Li , Yiran Chen

Computation-in-Memory (CiM) is attracting attention as a technology that can perform MAC calculations required for AI accelerators, at high speed with low power consumption. However, there is a problem regarding power consumption and…

Hardware Architecture · Computer Science 2025-07-21 Fuyuki Kihara , Seiji Uenohara , Satoshi Awamura , Naoko Misawa , Chihiro Matsui , Ken Takeuchi

Realizing today's cloud-level artificial intelligence functionalities directly on devices distributed at the edge of the internet calls for edge hardware capable of processing multiple modalities of sensory data (e.g. video, audio) at…

Flexibility at hardware level is the main driving force behind adaptive systems whose aim is to realise microarhitecture deconfiguration 'online'. This feature allows the software/hardware stack to tolerate drastic changes of the workload…

Hardware Architecture · Computer Science 2016-12-28 Ana Lava , Mahdi Jelodari Mamaghani , Siamak Mohammadi , Steve Furber

Resistive random-access memory (ReRAM)-based processing-in-memory (PIM) architecture is an attractive solution for training Graph Neural Networks (GNNs) on edge platforms. However, the immature fabrication process and limited write…

The increasing computational demand of Convolutional Neural Networks (CNNs) necessitates energy-efficient acceleration strategies. Compute-in-Memory (CIM) architectures based on Resistive Random Access Memory (RRAM) offer a promising…

Signal Processing · Electrical Eng. & Systems 2025-07-25 José Cubero-Cascante , Rebecca Pelke , Noah Flohr , Arunkumar Vaidyanathan , Rainer Leupers , Jan Moritz Joseph

ReRAM-based accelerators exhibit enormous potential to increase computational efficiency for DNN inference tasks, delivering significant performance and energy savings over traditional platforms. By incorporating adaptive scheduling, these…

Hardware Architecture · Computer Science 2025-02-05 Mohammad Sabri , Marc Riera , Antonio Gonzalez