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With technology scaling, the size of cache systems in chip-multiprocessors (CMPs) has been dramatically increased to efficiently store and manipulate a large amount of data in future applications and decrease the gap between cores and…

Hardware Architecture · Computer Science 2022-01-04 Pooneh Safayenikoo , Arghavan Asad , Mahmood Fathy

This paper introduces the concept of Transient Slack Capability (TSC), a set of three necessary device-level conditions to ensure stability under sustained power perturbations. TSC states that a device must (1) possess sufficient stored…

Systems and Control · Electrical Eng. & Systems 2025-05-26 Rodrigo Bernal , Federico Milano

We propose a decentralized spatial soft-core cache placement (SSCC) policy for wireless networks. SSCC yields a spatially balanced sampling via negative dependence across caches, and can be tuned to satisfy cache size constraints with high…

Information Theory · Computer Science 2019-02-01 Derya Malak , Muriel Médard , Edmund Yeh

The performance and capacity of solid-state drives (SSDs) are continuously improving to meet the increasing demands of modern data-intensive applications. Unfortunately, communication between the SSD controller and memory chips (e.g., 2D/3D…

In-storage computing with modern solid-state drives (SSDs) enables developers to offload programs from the host to the SSD. It has been proven to be an effective approach to alleviating the I/O bottleneck. To facilitate in-storage…

Cryptography and Security · Computer Science 2022-05-16 Yuqi Xue , Luyi Kang , Weiwei Jia , Xiaohao Wang , Jongryool Kim , Changhwan Youn , Myeong Joon Kang , Hyung Jin Lim , Bruce Jacob , Jian Huang

To mitigate the performance gap between CPU and the main memory, multi-level cache architectures are widely used in modern processors. Therefore, modeling the behaviors of the downstream caches becomes a critical part of the processor…

Hardware Architecture · Computer Science 2020-10-13 Ming Ling , Jiancong Ge , Guangmin Wang

The System Level Synthesis (SLS) approach facilitates distributed control of large cyberphysical networks in an easy-to-understand, computationally scalable way. We present an overview of the SLS approach and its associated extensions in…

Systems and Control · Electrical Eng. & Systems 2021-04-01 Jing Shuang Li , Carmen Amo Alonso , John C. Doyle

Large language models (LLMs) with different architectures and sizes have been developed. Serving each LLM with dedicated GPUs leads to resource waste and service inefficiency due to the varying demand of LLM requests. A common practice is…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-23 Yihao Zhao , Jiadun Chen , Peng Sun , Lei Li , Xuanzhe Liu , Xin Jin

NVMe SSD caching has demonstrated impressive capabilities in solving cloud block storage's I/O bottleneck and enhancing application performance in public, private, and hybrid cloud environments. However, traditional host-side caching…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-07-03 Qirui Yang , Runyu Jin , Ni Fan , Devasena Inupakutika , Bridget Davis , Ming Zhao

Spark is an in-memory analytics platform that targets commodity server environments today. It relies on the Hadoop Distributed File System (HDFS) to persist intermediate checkpoint states and final processing results. In Spark, immutable…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-08-22 Mijung Kim , Jun Li , Haris Volos , Manish Marwah , Alexander Ulanov , Kimberly Keeton , Joseph Tucek , Lucy Cherkasova , Le Xu , Pradeep Fernando

Tensor parallelism (TP) in large-scale LLM inference and training introduces frequent collective operations that dominate inter-GPU communication. While in-switch computing, exemplified by NVLink SHARP (NVLS), accelerates collective…

Hardware Architecture · Computer Science 2026-05-08 Chen Zhang , Qijun Zhang , Zhuoshan Zhou , Yijia Diao , Haibo Wang , Zhe Zhou , Zhipeng Tu , Zhiyao Li , Guangyu Sun , Zhuoran Song , Zhigang Ji , Jingwen Leng , Minyi Guo

Large Language Models (LLMs) have gained popularity in recent years, driving up the demand for inference. LLM inference is composed of two phases with distinct characteristics: a compute-bound prefill phase followed by a memory-bound decode…

Hardware Architecture · Computer Science 2025-10-10 Hengrui Zhang , Pratyush Patel , August Ning , David Wentzlaff

Memory-intensive applications, such as in-memory databases, caching systems and key-value stores, are increasingly demanding larger main memory to fit their working sets. Conventional swapping can enlarge the memory capacity by paging out…

Operating Systems · Computer Science 2021-07-30 Kan Zhong , Wenlin Cui , Youyou Lu , Quanzhang Liu , Xiaodan Yan , Qizhao Yuan , Siwei Luo , Keji Huang

Index-less Indexed Flash Code (ILIFC) is a coding scheme for flash memories, in which one bit of a data sequence is stored in a slice consisting of several cells but the index of the bit is stored implicitly. Although several modified ILIFC…

Information Theory · Computer Science 2017-02-01 Akira Yamawaki , Hiroshi Kamabe , Shan Lu

In LHC Run 3, ALICE will increase the data taking rate significantly to continuous readout of 50 kHz minimum bias Pb-Pb collisions. The reconstruction strategy of the online offline computing upgrade foresees a first synchronous online…

Instrumentation and Detectors · Physics 2018-11-29 David Rohr , Sergey Gorbunov , Marten Ole Schmidt , Ruben Shahoyan

Three-dimensional integrated circuits promise power, performance, and footprint gains compared to their 2D counterparts, thanks to drastic reductions in the interconnects' length through their smaller form factor. We can leverage the…

Last-Level Cache (LLC) represents the bulk of a modern CPU processor's transistor budget and is essential for application performance as LLC enables fast access to data in contrast to much slower main memory. However, applications with…

Hardware Architecture · Computer Science 2020-06-16 Priyank Faldu

High-Performance Computing (HPC) systems provide input/output (IO) performance growing relatively slowly compared to peak computational performance and have limited storage capacity. Computational Fluid Dynamics (CFD) applications aiming to…

Performance · Computer Science 2024-07-31 Yi Ju , Adalberto Perez , Stefano Markidis , Philipp Schlatter , Erwin Laure

We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity with SCM, the GPU can capture a larger fraction of the memory…

Hardware Architecture · Computer Science 2024-03-15 Jeongmin Hong , Sungjun Cho , Geonwoo Park , Wonhyuk Yang , Young-Ho Gong , Gwangsun Kim

The Big Data trend is putting strain on modern storage systems, which have to support high-performance I/O accesses for the large quantities of data. With the prevalent Von Neumann computing architecture, this data is constantly moved back…

Hardware Architecture · Computer Science 2021-12-02 Corne Lukken , Giulia Frascaria , Animesh Trivedi
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