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Current hardware for quantum computing suffers from high levels of noise, and so to achieve practical fault-tolerant quantum computing will require powerful and efficient methods to correct for errors in quantum circuits. Here, we explore…

Quantum Physics · Physics 2023-08-16 Aditya Jain , Pavithran Iyer , Stephen D. Bartlett , Joseph Emerson

Real-time decoding of quantum error correction (QEC) is essential for enabling fault-tolerant quantum computation. A practical decoder must operate with high accuracy at low latency, while remaining robust to spatial and temporal variations…

Quantum Physics · Physics 2026-01-23 Samuel Stein , Shuwen Kan , Chenxu Liu , Adrian Harkness , Sean Garner , Zefan Du , Yufei Ding , Ying Mao , Ang Li

As CMOS scaling reaches its technological limits, a radical departure from traditional von Neumann systems, which involve separate processing and memory units, is needed in order to significantly extend the performance of today's computers.…

The reliability of memory devices is affected by radiation induced soft errors. Multiple cell upsets (MCUs) caused by radiation corrupt data stored in multiple cells within memories. Error correction codes (ECCs) are typically used to…

Hardware Architecture · Computer Science 2023-08-01 Sayan Tripathi , Jhilam Jana , Jaydeb Bhaumik

Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome. In this work, we…

Emerging Technologies · Computer Science 2022-03-04 E. Esmanhotto , T. Hirtzlin , N. Castellani , S. Martin , B. Giraud , F. Andrieu , J. F. Nodin , D. Querlioz , J-M. Portal , E. Vianello

Compute-In-Memory (CIM) systems, particularly those utilizing ReRAM and memristive technologies, offer a promising path toward energy-efficient neural network computation. However, conventional quantization and compression techniques often…

Hardware Architecture · Computer Science 2025-12-23 Guan-Cheng Chen , Chieh-Lin Tsai , Pei-Hsuan Tsai , Yuan-Hao Chang

Processing In Memory (PIM) accelerators are promising architecture that can provide massive parallelization and high efficiency in various applications. Such architectures can instantaneously provide ultra-fast operation over extensive…

Hardware Architecture · Computer Science 2022-07-26 Kazi Abu Zubair , Sumit Kumar Jha , David Mohaisen , Clayton Hughes , Amro Awad

We propose MC-CIM, a compute-in-memory (CIM) framework for robust, yet low power, Bayesian edge intelligence. Deep neural networks (DNN) with deterministic weights cannot express their prediction uncertainties, thereby pose critical risks…

Machine Learning · Computer Science 2021-11-16 Priyesh Shukla , Shamma Nasrin , Nastaran Darabi , Wilfred Gomes , Amit Ranjan Trivedi

Edge deployment of low-batch large language models (LLMs) faces critical memory bandwidth bottlenecks when executing memory-intensive general matrix-vector multiplications (GEMV) operations. While digital processing-in-memory (PIM)…

Hardware Architecture · Computer Science 2026-01-21 Ye Lin , Chao Fang , Xiaoyong Song , Qi Wu , Anying Jiang , Yichuan Bai , Li Du

Open-ended grading is central to equitable and personalized education, yet manual grading remains time-consuming and costly, underscoring the need for automated grading systems. Although recent neural and large language model (LLM) based…

Computers and Society · Computer Science 2026-05-28 Chengshuai Zhao , Fan Zhang , Kumar Satvik Chaudhary , Yiwen Li , Lo Pang-Yun Ting , Ying-Chih Chen , Huan Liu

The exponential growth of artificial intelligence (AI) applications has exposed the inefficiency of conventional von Neumann architectures, where frequent data transfers between compute units and memory create significant energy and latency…

Hardware Architecture · Computer Science 2026-03-18 James Read , Ming-Yen Lee , Wei-Hsing Huang , Yuan-Chun Luo , Anni Lu , Shimeng Yu

We introduce a new type of sparse CSS quantum error correcting code based on the homology of hypermaps. Sparse quantum error correcting codes are of interest in the building of quantum computers due to their ease of implementation and the…

Information Theory · Computer Science 2013-10-22 Martin Leslie

In this paper, we propose a high-precision SRAM-based CIM macro that can perform 4x4-bit MAC operations and yield 9-bit signed output. The inherent discharge branches of SRAM cells are utilized to apply time-modulated MAC and 9-bit ADC…

Hardware Architecture · Computer Science 2023-07-20 Xiaomeng Wang , Fengshi Tian , Xizi Chen , Jiakun Zheng , Xuejiao Liu , Fengbin Tu , Jie Yang , Mohamad Sawan , Kwang-Ting Cheng , Chi-Ying Tsui

Low-density parity-check (LDPC) codes are an important feature of several communication and storage applications, offering a flexible and effective method for error correction. These codes are computationally complex and require the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-06 Oscar Ferraz , Vitor Silva , Gabriel Falcao

With the recent growth in demand for large-scale deep neural networks, compute in-memory (CiM) has come up as a prominent solution to alleviate bandwidth and on-chip interconnect bottlenecks that constrain Von-Neuman architectures. However,…

Hardware Architecture · Computer Science 2024-03-19 Souvik Kundu , Anthony Sarah , Vinay Joshi , Om J Omer , Sreenivas Subramoney

Computing-in-Memory (CiM) architectures based on emerging non-volatile memory (NVM) devices have demonstrated great potential for deep neural network (DNN) acceleration thanks to their high energy efficiency. However, NVM devices suffer…

Hardware Architecture · Computer Science 2022-07-26 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest…

Hardware Architecture · Computer Science 2025-02-12 Zhiqiang Yi , Yiwen Liang , Weidong Cao

In-memory computing is an emerging non-von Neumann computing paradigm where certain computational tasks are performed in memory by exploiting the physical attributes of the memory devices. Memristive devices such as phase-change memory…

Emerging Technologies · Computer Science 2020-04-08 Anastasios Petropoulos , Irem Boybat , Manuel Le Gallo , Evangelos Eleftheriou , Abu Sebastian , Theodore Antonakopoulos

Matrix multiplication is the dominant computation during Machine Learning (ML) inference. To efficiently perform such multiplication operations, Compute-in-memory (CiM) paradigms have emerged as a highly energy efficient solution. However,…

Hardware Architecture · Computer Science 2025-03-03 Tanvi Sharma , Mustafa Ali , Indranil Chakraborty , Kaushik Roy

The increasing complexity and energy demands of deep learning models have highlighted the limitations of traditional computing architectures, especially for edge devices with constrained resources. Spiking Neural Networks (SNNs) offer a…

Neural and Evolutionary Computing · Computer Science 2024-12-17 Wei-Ting Chen
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