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The resurgence of near-memory processing (NMP) with the advent of big data has shifted the computation paradigm from processor-centric to memory-centric computing. To meet the bandwidth and capacity demands of memory-centric computing, 3D…

Hardware Architecture · Computer Science 2021-04-29 Pritam Majumder , Jiayi Huang , Sungkeun Kim , Abdullah Muzahid , Dylan Siegers , Chia-Che Tsai , Eun Jung Kim

Multi-agent distributed consensus optimization problems arise in many signal processing applications. Recently, the alternating direction method of multipliers (ADMM) has been used for solving this family of problems. ADMM based distributed…

Systems and Control · Computer Science 2015-06-18 Tsung-Hui Chang , Mingyi Hong , Xiangfeng Wang

Predictable execution time upon accessing shared memories in multi-core real-time systems is a stringent requirement. A plethora of existing works focus on the analysis of Double Data Rate Dynamic Random Access Memories (DDR DRAMs), or…

Hardware Architecture · Computer Science 2018-10-17 Mohamed Hassan

Existing solid state drive (SSD) simulators unfortunately lack hardware and/or software architecture models. Consequently, they are far from capturing the critical features of contemporary SSD devices. More importantly, while the…

Hardware Architecture · Computer Science 2017-09-15 Myoungsoo Jung , Jie Zhang , Ahmed Abulila , Miryeong Kwon , Narges Shahidi , John Shalf , Nam Sung Kim , Mahmut Kandemir

Large Language Models (LLMs) based agents excel at diverse tasks, yet they suffer from brittle procedural memory that is manually engineered or entangled in static parameters. In this work, we investigate strategies to endow agents with a…

Computation and Language · Computer Science 2026-04-16 Runnan Fang , Yuan Liang , Xiaobin Wang , Jialong Wu , Shuofei Qiao , Pengjun Xie , Fei Huang , Huajun Chen , Ningyu Zhang

As the High Performance Computing world moves towards the Exa-Scale era, huge amounts of data should be analyzed, manipulated and stored. In the traditional storage/memory hierarchy, each compute node retains its data objects in its local…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-07 Yehonatan Fridman , Yaniv Snir , Matan Rusanovsky , Kfir Zvi , Harel Levin , Danny Hendler , Hagit Attiya , Gal Oren

NVMs have promising advantages (e.g., lower idle power, higher density) over the existing predominant main memory technology, DRAM. Yet, NVMs also have disadvantages (e.g., limited endurance). System architects are therefore examining…

Hardware Architecture · Computer Science 2019-03-26 Reza Salkhordeh , Onur Mutlu , Hossein Asadi

Memory disaggregation (MD) allows for scalable and elastic data center design by separating compute (CPU) from memory. With MD, compute and memory are no longer coupled into the same server box. Instead, they are connected to each other via…

Databases · Computer Science 2022-07-08 Ruihong Wang , Jianguo Wang , Stratos Idreos , M. Tamer Özsu , Walid G. Aref

Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem that prevents efficient and predictable real-time computing on…

Hardware Architecture · Computer Science 2018-04-20 Farzad Farshchi , Prathap Kumar Valsan , Renato Mancuso , Heechul Yun

Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with high energy efficiency. However, most non-volatile memory (NVM) devices suffer from…

Hardware Architecture · Computer Science 2022-05-27 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it impossible to identify a single "dataflow" (execution schedule) to perform optimally…

Hardware Architecture · Computer Science 2024-06-24 Man Shi , Steven Colleman , Charlotte VanDeMieroop , Antony Joseph , Maurice Meijer , Wim Dehaene , Marian Verhelst

Memory latency, bandwidth, capacity, and energy increasingly limit performance. In this paper, we reconsider proposed system architectures that consist of huge (many-terabyte to petabyte scale) memories shared among large numbers of CPUs.…

Hardware Architecture · Computer Science 2025-09-24 Samuel Dayo , Shuhan Liu , Peijing Li , Philip Levis , Subhasish Mitra , Thierry Tambe , David Tennenhouse , H. -S. Philip Wong

SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model…

Hardware Architecture · Computer Science 2018-11-06 Donghyun Gouk , Miryeong Kwon , Jie Zhang , Sungjoon Koh , Wonil Choi , Nam Sung Kim , Mahmut Kandemir , Myoungsoo Jung

Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

After nearly a decade of anticipation, scalable nonvolatile memory DIMMs are finally commercially available with the release of Intel's 3D XPoint DIMM. This new nonvolatile DIMM supports byte-granularity accesses with access times on the…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-08-13 Jian Yang , Juno Kim , Morteza Hoseinzadeh , Joseph Izraelevitz , Steven Swanson

The development of cost-effective highperformance parallel computing on multi-processor supercomputers makes it attractive to port excessively time consuming simulation software from personal computers (PC) to super computes. The power…

Distributed, Parallel, and Cluster Computing · Computer Science 2007-05-23 Ning Lu , Z. Todd Taylor , David P. Chassin , Ross T. Guttromson , R. Scott Studham

This paper describes a memory-efficient transformer model designed to drive a reduction in memory usage and execution time by substantial orders of magnitude without impairing the model's performance near that of the original model.…

Machine Learning · Computer Science 2025-01-03 Krisvarish V , Priyadarshini T , K P Abhishek Sri Saai , Vaidehi Vijayakumar

The increasing prevalence of cloud-native technologies, particularly containers, has led to the widespread adoption of containerized deployments in data centers. The advancement of deep neural network models has increased the demand for…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-11-22 Jinlong Hu , Zhizhe Rao , Xingchen Liu , Lihao Deng , Shoubin Dong

Large vision-language models have recently demonstrated impressive performance in planning and control tasks, driving interest in their application to real-world robotics. However, deploying these models for reasoning in embodied contexts…

Computer Vision and Pattern Recognition · Computer Science 2025-09-30 Karmesh Yadav , Yusuf Ali , Gunshi Gupta , Yarin Gal , Zsolt Kira

Indirect memory accesses frequently appear in applications where memory bandwidth is a critical bottleneck. Prior indirect memory access proposals, such as indirect prefetchers, runahead execution, fetchers, and decoupled access/execute…