English

Deterministic Memory Abstraction and Supporting Multicore System Architecture

Hardware Architecture 2018-04-20 v4 Operating Systems Performance

Abstract

Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem that prevents efficient and predictable real-time computing on multicore is the lack of a proper memory abstraction to express memory criticality, which cuts across various layers of the system: the application, OS, and hardware. We, therefore, propose a new holistic resource management approach driven by a new memory abstraction, which we call Deterministic Memory. The key characteristic of deterministic memory is that the platform - the OS and hardware - guarantees small and tightly bounded worst-case memory access timing. In contrast, we call the conventional memory abstraction as best-effort memory in which only highly pessimistic worst-case bounds can be achieved. We propose to utilize both abstractions to achieve high time predictability but without significantly sacrificing performance. We present deterministic memory-aware OS and architecture designs, including OS-level page allocator, hardware-level cache, and DRAM controller designs. We implement the proposed OS and architecture extensions on Linux and gem5 simulator. Our evaluation results, using a set of synthetic and real-world benchmarks, demonstrate the feasibility and effectiveness of our approach.

Keywords

Cite

@article{arxiv.1707.05260,
  title  = {Deterministic Memory Abstraction and Supporting Multicore System Architecture},
  author = {Farzad Farshchi and Prathap Kumar Valsan and Renato Mancuso and Heechul Yun},
  journal= {arXiv preprint arXiv:1707.05260},
  year   = {2018}
}
R2 v1 2026-06-22T20:49:19.576Z