English
Related papers

Related papers: CMDS: Cross-layer Dataflow Optimization for DNN Ac…

200 papers

This extended report presents DDS, a novel disaggregated storage architecture enabled by emerging networking hardware, namely DPUs (Data Processing Units). DPUs can optimize the latency and CPU consumption of disaggregated storage servers.…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-08-29 Qizhen Zhang , Philip Bernstein , Badrish Chandramouli , Jiasheng Hu , Yiming Zheng

Distributed systems can be found in various applications, e.g., in robotics or autonomous driving, to achieve higher flexibility and robustness. Thereby, data flow centric applications such as Deep Neural Network (DNN) inference benefit…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-10-14 Fabian Kreß , El Mahdi El Annabi , Tim Hotfilter , Julian Hoefer , Tanja Harbaum , Juergen Becker

Deep neural network (DNN) inference is increasingly being executed on mobile and embedded platforms due to several key advantages in latency, privacy and always-on availability. However, due to limited computing resources, efficient DNN…

Computer Vision and Pattern Recognition · Computer Science 2024-01-18 Lei Xun , Jonathon Hare , Geoff V. Merrett

Most of the existing work on FPGA acceleration of Convolutional Neural Network (CNN) focus on employing a single strategy (algorithm, dataflow, etc.) across all the layers. Such an approach does not achieve optimal latency on complex and…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-16 Yuan Meng , Sanmukh Kuppannagari , Rajgopal Kannan , Viktor Prasanna

We show that DNN accelerator micro-architectures and their program mappings represent specific choices of loop order and hardware parallelism for computing the seven nested loops of DNNs, which enables us to create a formal taxonomy of all…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-28 Xuan Yang , Mingyu Gao , Qiaoyi Liu , Jeff Ou Setter , Jing Pu , Ankita Nayak , Steven Emberton Bell , Kaidi Cao , Heonjae Ha , Priyanka Raina , Christos Kozyrakis , Mark Horowitz

The explosive growth of various types of big data and advances in AI technologies have catalyzed a new type of workloads called multi-modal DNNs. Multi-modal DNNs are capable of interpreting and reasoning about information from multiple…

Tensor processing units (TPUs) are one of the most well-known machine learning (ML) accelerators utilized at large scale in data centers as well as in tiny ML applications. TPUs offer several improvements and advantages over conventional ML…

Hardware Architecture · Computer Science 2024-07-12 Mohammed Elbtity , Peyton Chandarana , Ramtin Zand

The advancement of Deep Learning (DL) is driven by efficient Deep Neural Network (DNN) design and new hardware accelerators. Current DNN design is primarily tailored for general-purpose use and deployment on commercially viable platforms.…

Deep neural networks (DNNs) have been widely deployed across diverse domains such as computer vision and natural language processing. However, the impressive accomplishments of DNNs have been realized alongside extensive computational…

Machine Learning · Computer Science 2023-11-28 Chuangtao Chen , Grace Li Zhang , Xunzhao Yin , Cheng Zhuo , Ulf Schlichtmann , Bing Li

Among hardware accelerators for deep-learning inference, data flow implementations offer low latency and high throughput capabilities. In these architectures, each neuron is mapped to a dedicated hardware unit, making them well-suited for…

Machine Learning · Computer Science 2026-03-10 Tobias Habermann , Michael Mecik , Zhenyu Wang , César David Vera , Martin Kumm , Mario Garrido

To cope with the increasing demand and computational intensity of deep neural networks (DNNs), industry and academia have turned to accelerator technologies. In particular, FPGAs have been shown to provide a good balance between performance…

Hardware Architecture · Computer Science 2018-07-12 Yongming Shen , Tianchu Ji , Michael Ferdman , Peter Milder

In this article, we investigate the impact of architectural parameters of array-based DNN accelerators on accelerator's energy consumption and performance in a wide variety of network topologies. For this purpose, we have developed a tool…

Hardware Architecture · Computer Science 2022-06-28 Mohammad Ali Maleki , Mehdi Kamal , Ali Afzali-Kusha

Deep neural networks (DNNs) are becoming increasingly deeper, wider, and non-linear due to the growing demands on prediction accuracy and analysis quality. When training a DNN model, the intermediate activation data must be saved in the…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-24 Sian Jin , Guanpeng Li , Shuaiwen Leon Song , Dingwen Tao

Compute-In-Memory (CiM) is a promising solution to accelerate Deep Neural Networks (DNNs) as it can avoid energy-intensive DNN weight movement and use memory arrays to perform low-energy, high-density computations. These benefits have…

Hardware Architecture · Computer Science 2024-11-01 Tanner Andrulis , Joel S. Emer , Vivienne Sze

Deep Neural Networks (DNNs) have achieved remarkable success across various intelligent tasks but encounter performance and energy challenges in inference execution due to data movement bottlenecks. We introduce DataMaestro, a versatile and…

Hardware Architecture · Computer Science 2025-09-22 Xiaoling Yi , Yunhao Deng , Ryan Antonio , Fanchen Kong , Guilherme Paim , Marian Verhelst

Recent breakthroughs in Deep Neural Networks (DNNs) have fueled a tremendously growing demand for bringing DNN-powered intelligence into mobile platforms. While the potential of deploying DNNs on resource-constrained platforms has been…

Machine Learning · Computer Science 2020-06-09 Sicong Liu , Junzhao Du , Kaiming Nan , ZimuZhou , Atlas Wang , Yingyan Lin

Hardware accelerators such as GPUs are required for real-time, low-latency inference with Deep Neural Networks (DNN). However, due to the inherent limits to the parallelism they can exploit, DNNs often under-utilize the capacity of today's…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-27 Aditya Dhakal , Sameer G. Kulkarni , K. K. Ramakrishnan

Modern machine learning accelerators are designed to efficiently execute deep neural networks (DNNs) by optimizing data movement, memory hierarchy, and compute throughput. However, emerging DNN models such as large language models, state…

Hardware Architecture · Computer Science 2025-09-03 Shubham Negi , Manik Singhal , Aayush Ankit , Sudeep Bhoja , Kaushik Roy

SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip data movement overhead for large DNN models. Existing CIM…

Hardware Architecture · Computer Science 2026-04-21 Chenhao Xue , Yukun Wang , An Guo , Yuhui Shi , Jinwei Zhou , Xiping Dong , Yihan Yin , Yuanpeng Zhang , Tianyu Jia , Wei Gao , Qiang Wu , Xin Si , Jun Yang , Guangyu Sun

This work proposes a novel Energy-Aware Network Operator Search (ENOS) approach to address the energy-accuracy trade-offs of a deep neural network (DNN) accelerator. In recent years, novel inference operators have been proposed to improve…

Systems and Control · Electrical Eng. & Systems 2021-04-13 Shamma Nasrin , Ahish Shylendra , Yuti Kadakia , Nick Iliev , Wilfred Gomes , Theja Tulabandhula , Amit Ranjan Trivedi
‹ Prev 1 3 4 5 6 7 10 Next ›