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Deploying deep neural networks (DNNs) on resource-constrained edge devices such as FPGAs requires a careful balance among latency, power, and hardware resource usage, while maintaining high accuracy. Existing Lookup Table (LUT)-based DNNs…

Hardware Architecture · Computer Science 2026-01-16 Binglei Lou , Ruilin Wu , Philip Leong

Efficient neural networks (NNs) leveraging lookup tables (LUTs) have demonstrated significant potential for emerging AI applications, particularly when deployed on field-programmable gate arrays (FPGAs) for edge computing. These…

Machine Learning · Computer Science 2025-04-02 Marta Andronic , George A. Constantinides

The deployment of deep neural networks (DNNs) on resource-constrained edge devices such as field-programmable gate arrays (FPGAs) requires a careful balance of latency, power, and resource usage while maintaining high accuracy. Existing…

Hardware Architecture · Computer Science 2025-03-18 Binglei Lou , Ruilin Wu , Philip Leong

Standard deep neural network inference involves the computation of interleaved linear maps and nonlinear activation functions. Prior work for ultra-low latency implementations has hardcoded these operations inside FPGA lookup tables (LUTs).…

Machine Learning · Computer Science 2025-01-15 Marta Andronic , Jiawen Li , George A. Constantinides

Field-programmable gate arrays (FPGAs) are widely used to implement deep learning inference. Standard deep neural network inference involves the computation of interleaved linear maps and nonlinear activation functions. Prior work for…

Machine Learning · Computer Science 2024-02-12 Marta Andronic , George A. Constantinides

Field-Programmable Gate Array (FPGA) accelerators have proven successful in handling latency- and resource-critical deep neural network (DNN) inference tasks. Among the most computationally intensive operations in a neural network (NN) is…

Hardware Architecture · Computer Science 2024-12-10 Marta Andronic , George A. Constantinides

Research has shown that deep neural networks contain significant redundancy, and thus that high classification accuracy can be achieved even when weights and activations are quantized down to binary values. Network binarization on FPGAs…

Machine Learning · Computer Science 2020-03-04 Erwei Wang , James J. Davis , Peter Y. K. Cheung , George A. Constantinides

Research has shown that deep neural networks contain significant redundancy, and that high classification accuracies can be achieved even when weights and activations are quantised down to binary values. Network binarisation on FPGAs…

Machine Learning · Computer Science 2019-04-02 Erwei Wang , James J. Davis , Peter Y. K. Cheung , George A. Constantinides

Low-latency, energy-efficient deep neural networks (DNNs) inference are critical for edge applications, where traditional cloud-based deployment suffers from high latency and security risks. Field-Programmable Gate Arrays (FPGAs) offer a…

Hardware Architecture · Computer Science 2025-06-10 Zeyu Guo

Lookup-table (LUT) based neural networks can deliver ultra-low latency and excellent hardware efficiency on FPGAs by mapping arithmetic operations directly onto the logic primitives. However, state-of-the-art LUT-aware training (LAT)…

Hardware Architecture · Computer Science 2026-04-27 Chang Sun , Zhiqiang Que , Bakhtiar Zadeh , Qibin Liu , Kevin H. Alvarez , Wayne Luk , Maria Spiropulu

For FPGA-based neural network accelerators, digital signal processing (DSP) blocks have traditionally been the cornerstone for handling multiplications. This paper introduces LUTMUL, which harnesses the potential of look-up tables (LUTs)…

Hardware Architecture · Computer Science 2024-11-20 Yanyue Xie , Zhengang Li , Dana Diaconu , Suranga Handagala , Miriam Leeser , Xue Lin

Accelerating machine learning inference has been an active research area in recent years. In this context, field-programmable gate arrays (FPGAs) have demonstrated compelling performance by providing massive parallelism in deep neural…

Machine Learning · Computer Science 2025-01-06 Alireza Khataei , Kia Bazargan

FPGA-specific DNN architectures using the native LUTs as independently trainable inference operators have been shown to achieve favorable area-accuracy and energy-accuracy tradeoffs. The first work in this area, LUTNet, exhibited…

The widespread usage of high-definition screens on edge devices stimulates a strong demand for efficient image restoration algorithms. The way of caching deep learning models in a look-up table (LUT) is recently introduced to respond to…

Computer Vision and Pattern Recognition · Computer Science 2024-05-28 Jiacheng Li , Chang Chen , Zhen Cheng , Zhiwei Xiong

While there is a large body of research on efficient processing of deep neural networks (DNNs), ultra-low-latency realization of these models for applications with stringent, sub-microsecond latency requirements continues to be an…

Machine Learning · Computer Science 2021-04-13 Mahdi Nazemi , Arash Fayyazi , Amirhossein Esmaili , Atharva Khare , Soheil Nazar Shahsavani , Massoud Pedram

The emergence of neural network capabilities invariably leads to a significant surge in computational demands due to expanding model sizes and increased computational complexity. To reduce model size and lower inference costs, recent…

Hardware Architecture · Computer Science 2025-01-22 Guoyu Li , Shengyu Ye , Chunyun Chen , Yang Wang , Fan Yang , Ting Cao , Cheng Liu , Mohamed M. Sabry , Mao Yang

Vision Transformers have been tremendously successful in computer vision tasks. However, their large computational, memory, and energy demands are a challenge for edge inference on FPGAs -- a field that has seen a recent surge in demand. We…

Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement arbitrary-precision arithmetic operations, and can perform…

Hardware Architecture · Computer Science 2025-07-17 Junius Pun , Xilai Dai , Grace Zgheib , Mahesh A. Iyer , Andrew Boutros , Vaughn Betz , Mohamed S. Abdelfattah

To cope with the increasing demand and computational intensity of deep neural networks (DNNs), industry and academia have turned to accelerator technologies. In particular, FPGAs have been shown to provide a good balance between performance…

Hardware Architecture · Computer Science 2018-07-12 Yongming Shen , Tianchu Ji , Michael Ferdman , Peter Milder

The rapid development of large language models (LLM) has greatly enhanced everyday applications. While many FPGA-based accelerators, with flexibility for fine-grained data control, exhibit superior speed and energy efficiency compared to…

Hardware Architecture · Computer Science 2026-03-24 Zifan He , Shengyu Ye , Rui Ma , Yang Wang , Jason Cong
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