Related papers: A time-to-digital converter with steady calibratio…
In most digital-to-time converter (DTC) based applications, apart from maintaining low integral non-linearity (INL), it is also required of the system to achieve a wide frequency translation range. To achieve this performance, we present a…
Identifying light mesons which contain only up/down quarks (pions) from those containing a strange quark (kaons) over the typical meter length scales of a particle physics detector requires instrumentation capable of measuring flight times…
As the development of electronic science and technology, electronic data acquisition (DAQ) system is more and more widely applied to nuclear physics experiments. Workstations are often utilized for data storage, data display, data…
This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…
A highly integrated, high performance, and re-configurable device, which is designed for the Nitrogen-Vacancy center based quantum applications, is reported. The digital compartment of the device is fully implemented in a…
A new TDC chip has been developed for the COMPASS experiment at CERN. The resulting ASIC offers an unprecedented degree of flexibility and functionality. Its capability to handle highest hit and trigger input rates as well as its low power…
We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…
We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit of mixed-signal spiking neural networks. We named this circuit "time-domain DAC (TDAC)". This produces weights for converting a digital input code into…
We demonstrate a 10-GHz bandwidth digitizer with 7-effective bits of resolution and 52dB SFDR, using photonic time stretch technique. To the best of our knowledge, this is the highest resolution analog-to-digital converter (ADC) of the same…
A Time to Digital Converter (TDC) based system, to be used for most sub-detectors in the high-flux rare-decay experiment NA62 at CERN SPS, was built as part of the NA62 fully digital Trigger and Data AcQuisition system (TDAQ), in which the…
An ADC is used to convert analog signals into binary signals. Compared with many other types of ADCs, flash converters are incredibly quick. A typical Flash ADC consists of 2n resistors, 2n-1 op-amp comparators, and an encoder which…
Timing-pick up detectors with excellent timing resolutions are essential in many modern nuclear physics experiments. Aiming to develop a Time-Of-Flight system with precision down to about 10 ps, we have made a systematic study of the timing…
Quantum frequency conversion (QFC) of photonic signals preserves quantum information while simultaneously changing the signal wavelength. A common application of QFC is to translate the wavelength of a signal compatible with the current…
Time interleaved analog-to-digital conversion (TIADC) based on parallelism is an effective way to meet the requirement of the ultra-fast waveform digitizer beyond Gsps. Different methods to correct the mismatch errors among different…
High sampling speed can be achieved using multiple Analog-to-Digital Converters (ADCs) based on the Time-Interleaving A/D Conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC…
We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been…
Parametric down-conversion (PDC) is the established standard for the practical generation of a multiplicity of quantum optical states. These include two-mode squeezed vacuum, heralded non-Gaussian states and entangled photon pairs. Detailed…
A novel background calibration technique for Time-Interleaved Analog-to-Digital Converters (TI-ADCs) is presented in this paper. This technique is applicable to equalized digital communication receivers. As shown by Tsai et al. [1] and Luna…
With the advent of the 5G wireless networks, achieving tens of gigabits per second throughputs and low, milliseconds, latency has become a reality. This level of performance will fuel numerous real-time applications, such as autonomy and…
We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~\mu \text{m}^2$, where the sensors are Low Gain…