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Combinatorial optimization (CO) underpins applications in science and engineering, ranging from logistics to electronic design automation. A classic example is the NP-complete Traveling Salesman Problem (TSP). Finding exact solutions for…

There is increasing demand for specialized hardware for training deep neural networks, both in edge/IoT environments and in high-performance computing systems. The design space of such hardware is very large due to the wide range of…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-05-03 Yangjie Qi , Shuo Zhang , Tarek M. Taha

The need to efficiently execute different Deep Neural Networks (DNNs) on the same computing platform, coupled with the requirement for easy scalability, makes Multi-Chip Module (MCM)-based accelerators a preferred design choice. Such an…

Hardware Architecture · Computer Science 2024-08-26 Abhijit Das , Enrico Russo , Maurizio Palesi

The inherent dynamics of the neuron membrane potential in Spiking Neural Networks (SNNs) allows processing of sequential learning tasks, avoiding the complexity of recurrent neural networks. The highly-sparse spike-based computations in…

Hardware Architecture · Computer Science 2021-07-09 Amogh Agrawal , Mustafa Ali , Minsuk Koo , Nitin Rathi , Akhilesh Jaiswal , Kaushik Roy

State space models (SSMs) have recently emerged as a powerful framework for long sequence processing, outperforming traditional methods on diverse benchmarks. Fundamentally, SSMs can generalize both recurrent and convolutional networks and…

Signal Processing · Electrical Eng. & Systems 2025-12-24 Xiaoyu Zhang , Mingtao Hu , Sen Lu , Soohyeon Kim , Eric Yeu-Jer Lee , Yuyang Liu , Wei D. Lu

This paper presents a tutorial and review of SRAM-based Compute-in-Memory (CIM) circuits, with a focus on both Digital CIM (DCIM) and Analog CIM (ACIM) implementations. We explore the fundamental concepts, architectures, and operational…

Hardware Architecture · Computer Science 2024-11-25 Kentaro Yoshioka , Shimpei Ando , Satomi Miyagi , Yung-Chin Chen , Wenlun Zhang

As the models and the datasets to train deep learning (DL) models scale, system architects are faced with new challenges, one of which is the memory capacity bottleneck, where the limited physical memory inside the accelerator device…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-19 Youngeun Kwon , Minsoo Rhu

Stochastic computing (SC) offers hardware simplicity but suffers from low throughput, while high-throughput Digital Computing-in-Memory (DCIM) is bottlenecked by costly adder logic for matrix-vector multiplication (MVM). To address this…

Hardware Architecture · Computer Science 2026-01-13 Kunming Shao , Liang Zhao , Jiangnan Yu , Zhipeng Liao , Xiaomeng Wang , Yi Zou , Tim Kwang-Ting Cheng , Chi-Ying Tsui

Deploying large language models (LLMs) on edge devices is crucial for delivering fast responses and ensuring data privacy. However, the limited storage, weight, and power of edge devices make it difficult to deploy LLM-powered applications.…

Hardware Architecture · Computer Science 2025-06-04 Chunlin Tian , Xinpeng Qin , Kahou Tam , Li Li , Zijian Wang , Yuanzhe Zhao , Minglei Zhang , Chengzhong Xu

Architectures that incorporate Computing-in-Memory (CiM) using emerging non-volatile memory (NVM) devices have become strong contenders for deep neural network (DNN) acceleration due to their impressive energy efficiency. Yet, a significant…

Hardware Architecture · Computer Science 2024-01-12 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

The Continuous Learning (CL) paradigm consists of continuously evolving the parameters of the Deep Neural Network (DNN) model to progressively learn to perform new tasks without reducing the performance on previous tasks, i.e., avoiding the…

Machine Learning · Computer Science 2025-05-07 Eugenio Ressa , Alberto Marchisio , Maurizio Martina , Guido Masera , Muhammad Shafique

The Mixture-of-Experts (MoE) models have emerged as the state-of-the-art paradigm for scaling up large language models (LLMs) without proportionally increased computational cost. However, its on-device deployment faces a critical challenge…

Hardware Architecture · Computer Science 2026-05-25 Weikai Xu , Meng Li , Shuzhang Zhong , Tianyang Luo , Dongxue Zhao , Ling Liang , Zongwei Wang , Qianqian Huang , Yimao Cai , Ru Huang

Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular…

Hardware Architecture · Computer Science 2025-11-26 Youngsuk Kim , Junghwan Lim , Hyuk-Jae Lee , Chae Eun Rhee

Compute-in-memory (PIM) mitigates the memory wall by performing computation within memory, reducing data movement and improving energy efficiency. DRAM-based PIM is particularly attractive due to its high density, mature manufacturing…

Hardware Architecture · Computer Science 2026-05-26 Siddhartha Raman Sundara Raman , Siyuan Ma , Lizy Kurian John

Processing-in-memory (PIM) has shown extraordinary potential in accelerating neural networks. To evaluate the performance of PIM accelerators, we present an ISA-based simulation framework including a dedicated ISA targeting neural networks…

Hardware Architecture · Computer Science 2024-02-29 Xinyu Wang , Xiaotian Sun , Yinhe Han , Xiaoming Chen

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

Machine intelligence, especially using convolutional neural networks (CNNs), has become a large area of research over the past years. Increasingly sophisticated hardware accelerators are proposed that exploit e.g. the sparsity in…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-23 Andreas Bytyn , René Ahlsdorf , Rainer Leupers , Gerd Ascheid

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better accuracy and the other with more compact sizing for energy…

Hardware Architecture · Computer Science 2021-07-07 Gokul Krishnan , Sumit K. Mandal , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

Concept bottleneck models (CBM) are a popular way of creating more interpretable neural networks by having hidden layer neurons correspond to human-understandable concepts. However, existing CBMs and their variants have two crucial…

Machine Learning · Computer Science 2023-06-06 Tuomas Oikarinen , Subhro Das , Lam M. Nguyen , Tsui-Wei Weng

CXLMemSim is a fast, lightweight simulation framework that enables performance characterization of memory systems based on Compute Express Link (CXL) .mem technology. CXL.mem allows disaggregation and pooling of memory to mitigate memory…

Performance · Computer Science 2025-06-18 Yiwei Yang , Brian Zhao , Yusheng Zheng , Pooneh Safayenikoo , Tanvir Ahmed Khan , Andi Quinn