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Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Spiking neural networks excel at event-driven sensing. Yet, maintaining task-relevant context over long timescales both algorithmically and in hardware, while respecting both tight energy and memory budgets, remains a core challenge in the…

Neural and Evolutionary Computing · Computer Science 2026-05-05 Pengfei Sun , Zhe Su , Jascha Achterberg , Giacomo Indiveri , Dan F. M. Goodman , Danyal Akarca

SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip data movement overhead for large DNN models. Existing CIM…

Hardware Architecture · Computer Science 2026-04-21 Chenhao Xue , Yukun Wang , An Guo , Yuhui Shi , Jinwei Zhou , Xiping Dong , Yihan Yin , Yuanpeng Zhang , Tianyu Jia , Wei Gao , Qiang Wu , Xin Si , Jun Yang , Guangyu Sun

The human brain simultaneously optimizes synaptic weights and topology by growing, pruning, and strengthening synapses while performing all computation entirely in memory. In contrast, modern artificial-intelligence systems separate weight…

Hardware Architecture · Computer Science 2025-06-17 Songqi Wang , Yue Zhang , Jia Chen , Xinyuan Zhang , Yi Li , Ning Lin , Yangu He , Jichang Yang , Yingjie Yu , Yi Li , Zhongrui Wang , Xiaojuan Qi , Han Wang

Non-volatile memory (NVM) crossbars have been identified as a promising technology, for accelerating important machine learning operations, with matrix-vector multiplication being a key example. Binary neural networks (BNNs) are especially…

Emerging Technologies · Computer Science 2023-08-14 Ruirong Huang , Zichao Yue , Caroline Huang , Janarbek Matai , Zhiru Zhang

Sparse matrix-dense matrix multiplication (SpMM) is a critical kernel in scientific computing, graph analytics, and machine learning, whose performance is often constrained by memory bandwidth. In this work, we investigate the applicability…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-09 Matthew Qian , Yahia Ramadan , Suhita Anubha , Ariful Azad

The Von Neumann bottleneck, which relates to the energy cost of moving data from memory to on-chip core and vice versa, is a serious challenge in state-of-the-art AI architectures, like Convolutional Neural Networks' (CNNs) accelerators.…

Hardware Architecture · Computer Science 2025-02-27 Cristian Sestito , Ahmed J. Abdelmaksoud , Shady Agwa , Themis Prodromakis

Realizing today's cloud-level artificial intelligence functionalities directly on devices distributed at the edge of the internet calls for edge hardware capable of processing multiple modalities of sensory data (e.g. video, audio) at…

The computing wall and data movement challenges of deep neural networks (DNNs) have exposed the limitations of conventional CMOS-based DNN accelerators. Furthermore, the deep structure and large model size will make DNNs prohibitive to…

Signal Processing · Electrical Eng. & Systems 2019-12-12 Geng Yuan , Xiaolong Ma , Sheng Lin , Zhengang Li , Caiwen Ding

Generative AIBIM, a successful structural design pipeline, has proven its ability to intelligently generate high-quality, diverse, and creative shear wall designs that are tailored to specific physical conditions. However, the current…

Computer Vision and Pattern Recognition · Computer Science 2024-12-31 Zhili He , Yu-Hsing Wang

Large Language Models (LLMs) are increasingly deployed on edge devices with Neural Processing Units (NPUs), yet the decode phase remains memory-intensive, limiting performance. Processing-in-Memory (PIM) offers a promising solution, but…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-18 Hai Huang

Binary neural networks (BNNs) that use 1-bit weights and activations have garnered interest as extreme quantization provides low power dissipation. By implementing BNNs as computing-in-memory (CIM), which computes multiplication and…

Machine Learning · Computer Science 2021-10-20 Minh-Son Le , Thi-Nhan Pham , Thanh-Dat Nguyen , Ik-Joon Chang

Recently DRAM-based PIMs (processing-in-memories) with unmodified cell arrays have demonstrated impressive performance for accelerating AI applications. However, due to the very restrictive hardware constraints, PIM remains an accelerator…

Hardware Architecture · Computer Science 2023-10-17 Jaewoo Park , Sugil Lee , Jongeun Lee

DNA sequence classification is a fundamental task in computational biology with vast implications for applications such as disease prevention and drug design. Therefore, fast high-quality sequence classifiers are significantly important.…

Machine Learning · Computer Science 2023-11-07 Marcel Khalifa , Barak Hoffer , Orian Leitersdorf , Robert Hanhan , Ben Perach , Leonid Yavits , Shahar Kvatinsky

The continuing advancement of memory technology has not only fueled a surge in performance, but also substantially exacerbate reliability challenges. Traditional solutions have primarily focused on improving the efficiency of protection…

Hardware Architecture · Computer Science 2025-09-09 Fan Li , Mimi Xie , Yanan Guo , Huize Li , Xin Xin

Compute-in-memory (CIM) accelerators for spiking neural networks (SNNs) are promising solutions to enable $\mu$s-level inference latency and ultra-low energy in edge vision applications. Yet, their current lack of flexibility at both the…

Hardware Architecture · Computer Science 2024-10-31 Nicolas Chauvaux , Adrian Kneip , Christoph Posch , Kofi Makinwa , Charlotte Frenkel

Compute-in-memory (CIM) accelerators using non-volatile memory (NVM) devices offer promising solutions for energy-efficient and low-latency Deep Neural Network (DNN) inference execution. However, practical deployment is often hindered by…

Hardware Architecture · Computer Science 2024-08-23 Yifan Qin , Zheyu Yan , Zixuan Pan , Wujie Wen , Xiaobo Sharon Hu , Yiyu Shi

Deep neural network (DNN) inference using reduced integer precision has been shown to achieve significant improvements in memory utilization and compute throughput with little or no accuracy loss compared to full-precision floating-point.…

Hardware Architecture · Computer Science 2023-04-11 Yuzong Chen , Mohamed S. Abdelfattah

Nowadays, we are witnessing an Artificial Intelligence revolution that dominates the technology landscape in various application domains, such as healthcare, robotics, automotive, security, and defense. Massive-scale AI models, which mimic…

Hardware Architecture · Computer Science 2026-04-23 Shady Agwa , Yikang Shen , Shiwei Wang , Themis Prodromakis

Triangles are the basic substructure of networks and triangle counting (TC) has been a fundamental graph computing problem in numerous fields such as social network analysis. Nevertheless, like other graph computing problems, due to the…

Hardware Architecture · Computer Science 2021-12-02 Xueyan Wang , Jianlei Yang , Yinglin Zhao , Xiaotao Jia , Rong Yin , Xuhang Chen , Gang Qu , Weisheng Zhao
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