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Related papers: HCiM: ADC-Less Hybrid Analog-Digital Compute in Me…

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The energy efficiency of analog computing-in-memory (ACIM) accelerator for recurrent neural networks, particularly long short-term memory (LSTM) network, is limited by the high proportion of nonlinear (NL) operations typically executed…

Hardware Architecture · Computer Science 2025-12-09 Junyi Yang , Xinyu Luo , Ye Ke , Zheng Wang , Hongyang Shang , Shuai Dong , Zhengnan Fu , Xiaofeng Yang , Hongjie Liu , Arindam Basu

Deep neural networks are widely deployed in many fields. Due to the in-situ computation (known as processing in memory) capacity of the Resistive Random Access Memory (ReRAM) crossbar, ReRAM-based accelerator shows potential in accelerating…

Hardware Architecture · Computer Science 2024-03-11 Chenguang Zhang , Zhihang Yuan , Xingchen Li , Guangyu Sun

In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the…

Signal Processing · Electrical Eng. & Systems 2026-01-05 Dhandeep Challagundla , Ignatius Bezzam , Riadul Islam

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest…

Hardware Architecture · Computer Science 2025-02-12 Zhiqiang Yi , Yiwen Liang , Weidong Cao

SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequently compromise accuracy, and this trade-off remains…

Hardware Architecture · Computer Science 2025-09-03 Wenlun Zhang , Shimpei Ando , Yung-Chin Chen , Kentaro Yoshioka

This work discusses memory-immersed collaborative digitization among compute-in-memory (CiM) arrays to minimize the area overheads of a conventional analog-to-digital converter (ADC) for deep learning inference. Thereby, using the proposed…

Hardware Architecture · Computer Science 2023-07-11 Shamma Nasrin , Maeesha Binte Hashem , Nastaran Darabi , Benjamin Parpillon , Farah Fahim , Wilfred Gomes , Amit Ranjan Trivedi

Compute-in-memory (CIM) is an efficient method for implementing deep neural networks (DNNs) but suffers from substantial overhead from analog-to-digital converters (ADCs), especially as ADC precision increases. Low-precision ADCs can reduce…

Hardware Architecture · Computer Science 2025-03-14 Jiyoon Kim , Kang Eun Jeon , Yulhwa Kim , Jong Hwan Ko

Edge computing is a promising solution for handling high-dimensional, multispectral analog data from sensors and IoT devices for applications such as autonomous drones. However, edge devices' limited storage and computing resources make it…

Machine Learning · Computer Science 2023-09-21 Nastaran Darabi , Amit R. Trivedi

The cost involved in training deep neural networks (DNNs) on von-Neumann architectures has motivated the development of novel solutions for efficient DNN training accelerators. We propose a hybrid in-memory computing (HIC) architecture for…

Hardware Architecture · Computer Science 2021-02-11 Vinay Joshi , Wangxin He , Jae-sun Seo , Bipin Rajendran

In recent years, processing in memory (PIM) based mixedsignal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN computations. However, PIM designs are sensitive to imperfections…

Hardware Architecture · Computer Science 2022-08-31 Payman Behnam , Uday Kamal , Saibal Mukhopadhyay

Analog Compute-in-Memory (CiM) accelerators use analog-digital converters (ADCs) to read the analog values that they compute. ADCs can consume significant energy and area, so architecture-level ADC decisions such as ADC resolution or number…

Hardware Architecture · Computer Science 2024-05-15 Tanner Andrulis , Ruicong Chen , Hae-Seung Lee , Joel S. Emer , Vivienne Sze

Over the past few years, silicon photonics-based computing has emerged as a promising alternative to CMOS-based computing for Deep Neural Networks (DNN). Unfortunately, the non-linear operations and the high-precision requirements of DNNs…

SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip data movement overhead for large DNN models. Existing CIM…

Hardware Architecture · Computer Science 2026-04-21 Chenhao Xue , Yukun Wang , An Guo , Yuhui Shi , Jinwei Zhou , Xiping Dong , Yihan Yin , Yuanpeng Zhang , Tianyu Jia , Wei Gao , Qiang Wu , Xin Si , Jun Yang , Guangyu Sun

The attention mechanism is a key computing kernel of Transformers, calculating pairwise correlations across the entire input sequence. The computing complexity and frequent memory access in computing self-attention put a huge burden on the…

Hardware Architecture · Computer Science 2024-10-31 Ashkan Moradifirouzabadi , Divya Sri Dodla , Mingu Kang

Recently, analog compute-in-memory (CIM) architectures based on emerging analog non-volatile memory (NVM) technologies have been explored for deep neural networks (DNN) to improve energy efficiency. Such architectures, however, leverage…

Signal Processing · Electrical Eng. & Systems 2020-08-07 Zhe Wan , Tianyi Wang , Yiming Zhou , Subramanian S. Iyer , Vwani P. Roychowdhury

This paper presents a tutorial and review of SRAM-based Compute-in-Memory (CIM) circuits, with a focus on both Digital CIM (DCIM) and Analog CIM (ACIM) implementations. We explore the fundamental concepts, architectures, and operational…

Hardware Architecture · Computer Science 2024-11-25 Kentaro Yoshioka , Shimpei Ando , Satomi Miyagi , Yung-Chin Chen , Wenlun Zhang

The deployment of large language models (LLMs) presents significant challenges due to their enormous memory footprints, low arithmetic intensity, and stringent latency requirements, particularly during the autoregressive decoding stage.…

Hardware Architecture · Computer Science 2025-11-03 Cenlin Duan , Jianlei Yang , Rubing Yang , Yikun Wang , Yiou Wang , Lingkun Long , Yingjie Qi , Xiaolin He , Ao Zhou , Xueyan Wang , Weisheng Zhao

Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM…

Hardware Architecture · Computer Science 2024-07-19 Zhiyu Chen , Ziyuan Wen , Weier Wan , Akhil Reddy Pakala , Yiwei Zou , Wei-Chen Wei , Zengyi Li , Yubei Chen , Kaiyuan Yang

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Hardware Architecture · Computer Science 2026-04-15 Omar Numan , Gaurav Singh , Kazybek Adam , Jelin Leslin , Aleksi Korsman , Otto Simola , Marko Kosunen , Jussi Ryynänen , Martin Andraud

Processing-in-memory (PIM) architectures have demonstrated great potential in accelerating numerous deep learning tasks. Particularly, resistive random-access memory (RRAM) devices provide a promising hardware substrate to build PIM…

Hardware Architecture · Computer Science 2022-02-01 Weidong Cao , Yilong Zhao , Adith Boloor , Yinhe Han , Xuan Zhang , Li Jiang
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