English
Related papers

Related papers: AFPR-CIM: An Analog-Domain Floating-Point RRAM-bas…

200 papers

The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part of the system energy consumption. Logic--In--Memory (LiM)…

Hardware Architecture · Computer Science 2023-04-14 Fabrizio Ottati , Giovanna Turvani , Marco Vacca , Guido Masera

Image bitmaps have been widely used in in-memory applications, which consume lots of storage space and energy. Compared with legacy DRAM, non-volatile memories (NVMs) are suitable for bitmap storage due to the salient features in capacity…

Hardware Architecture · Computer Science 2019-05-08 Zhangyu Chen , Yu Hua , Pengfei Zuo , Yuanyuan Sun , Yuncheng Guo

With the increased attention to memristive-based in-memory analog computing (IMAC) architectures as an alternative for energy-hungry computer systems for machine learning applications, a tool that enables exploring their device- and…

Emerging Technologies · Computer Science 2023-06-14 Md Hasibul Amin , Mohammed E. Elbtity , Ramtin Zand

This paper presents a programmable in-memory-computing processor, demonstrated in a 65nm CMOS technology. For data-centric workloads, such as deep neural networks, data movement often dominates when implemented with today's computing…

Hardware Architecture · Computer Science 2020-09-17 Hongyang Jia , Yinqi Tang , Hossein Valavi , Jintao Zhang , Naveen Verma

This paper discusses recent research that aims to enable computation close to data, an approach we broadly call processing-in-memory (PIM). PIM places computation mechanisms in or near where the data is stored (i.e., inside memory chips or…

Hardware Architecture · Computer Science 2025-02-07 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun , Mohammad Sadrosadati , Geraldo F. Oliveira

Various processing-in-memory (PIM) accelerators based on various devices, micro-architectures, and interfaces have been proposed to accelerate deep neural networks (DNNs). How to deploy DNNs onto PIM-based accelerators is the key to explore…

Hardware Architecture · Computer Science 2024-11-15 Xiaotian Sun , Xinyu Wang , Wanqian Li , Yinhe Han , Xiaoming Chen

As supercomputers advance towards exascale capabilities, computational intensity increases significantly, and the volume of data requiring storage and transmission experiences exponential growth. Adaptive Mesh Refinement (AMR) has emerged…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-07-20 Daoce Wang , Jesus Pulido , Pascal Grosset , Jiannan Tian , Sian Jin , Houjun Tang , Jean Sexton , Sheng Di , Zarija Lukić , Kai Zhao , Bo Fang , Franck Cappello , James Ahrens , Dingwen Tao

FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading FPGA vendors have enhanced their architectures to more…

Hardware Architecture · Computer Science 2024-04-18 Endri Taka , Dimitrios Gourounas , Andreas Gerstlauer , Diana Marculescu , Aman Arora

The primary operation in DNNs is the dot product of quantized input activations and weights. Prior works have proposed the design of memory-centric architectures based on the Processing-In-Memory (PIM) paradigm. Resistive RAM (ReRAM)…

Hardware Architecture · Computer Science 2023-06-29 Mohammad Sabri , Marc Riera , Antonio González

All-pairs shortest paths (APSP) is a fundamental algorithm used for routing, logistics, and network analysis, but the cubic time complexity and heavy data movement of the canonical Floyd-Warshall (FW) algorithm severely limits its…

Hardware Architecture · Computer Science 2025-12-23 Tsung-Han Lu , Zheyu Li , Minxuan Zhou , Tajana Rosing

Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing.…

Hardware Architecture · Computer Science 2023-10-18 Linghao Song , Fan Chen , Xuehai Qian , Hai Li , Yiran Chen

Modern Artificial Intelligence (AI) applications are increasingly utilizing multi-tenant deep neural networks (DNNs), which lead to a significant rise in computing complexity and the need for computing parallelism. ReRAM-based…

Emerging Technologies · Computer Science 2024-08-12 Bojing Li , Duo Zhong , Xiang Chen , Chenchen Liu

A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional neural network (CNN) inference. It leverages a novel…

Hardware Architecture · Computer Science 2021-07-07 Zhiyu Chen , Zhanghao Yu , Qing Jin , Yan He , Jingyu Wang , Sheng Lin , Dai Li , Yanzhi Wang , Kaiyuan Yang

With the continued growth in field-programmable gate array (FPGA) capacity and their incorporation into new environments such as datacenters, we have witnessed the introduction of a new class of reconfigurable acceleration devices (RADs)…

Hardware Architecture · Computer Science 2023-01-13 Andrew Boutros , Eriko Nurvitadhi , Vaughn Betz

Tensor processing units (TPUs), specialized hardware accelerators for machine learning tasks, have shown significant performance improvements when executing convolutional layers in convolutional neural networks (CNNs). However, they…

Hardware Architecture · Computer Science 2023-04-20 Mohammed E. Elbtity , Brendan Reidy , Md Hasibul Amin , Ramtin Zand

The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit (CPU) and memory, with concomitant limitations in the actual execution speed. However, it has been recently…

Emerging Technologies · Computer Science 2014-07-03 Fabio Lorenzo Traversa , Fabrizio Bonani , Yuriy V. Pershin , Massimiliano Di Ventra

Commercial FPGAs, such as AMD Versal devices, increasingly incorporate AI engines that exploit low-precision packed-SIMD fused multiply-accumulate (FMA) to achieve proportional throughput gains. However, trans-precision FMA (e.g.,…

Hardware Architecture · Computer Science 2026-05-11 Jiayi Wang , Maohua Nie , Sin-Chen Lin , C. -J. Richard Shi , Ang Li

Approximate Nearest Neighbor Search (ANNS) is a core primitive in modern AI systems, and graph-based methods currently offer the best accuracy-efficiency trade-off at scale. The workload is fundamentally memory-bound: graph traversal…

Hardware Architecture · Computer Science 2026-05-26 Sitian Chen , Yusen Li , Yao Chen , Minwen Deng , Jintao Meng , Amelie Chi Zhou

Computation-in-Memory (CiM) is attracting attention as a technology that can perform MAC calculations required for AI accelerators, at high speed with low power consumption. However, there is a problem regarding power consumption and…

Hardware Architecture · Computer Science 2025-07-21 Fuyuki Kihara , Seiji Uenohara , Satoshi Awamura , Naoko Misawa , Chihiro Matsui , Ken Takeuchi

To support emerging applications ranging from holographic communications to extended reality, next-generation mobile wireless communication systems require ultra-fast and energy-efficient (UFEE) baseband processors. Traditional…

Signal Processing · Electrical Eng. & Systems 2022-05-10 Qunsong Zeng , Jiawei Liu , Jun Lan , Yi Gong , Zhongrui Wang , Yida Li , Kaibin Huang