Related papers: Performance studies of a SiPM-readout system with …

The separation of the data capture and analysis in modern vision systems has led to a massive amount of data transfer between the end devices and cloud computers, resulting in long latency, slow response, and high power consumption.…

The NEXT-White detector, a high-pressure gaseous xenon time projection chamber, demonstrated the excellence of this technology for future neutrinoless double beta decay searches using photomultiplier tubes (PMTs) to measure energy and…

Post-Silicon Tunable (PST) clock buffers are widely used in high performance designs to counter process variations. By allowing delay compensation between consecutive register stages, PST buffers can effectively improve the yield of digital…

We present the first results from the HPSoC ASIC designed for readout of Ultra-fast Silicon Detectors. The 4-channel ASIC manufactured in 65 nm CMOS by TSMC has been optimized for 50 um thick AC-LGAD. The evaluation of the analog front end…

Switched capacitor arrays (SCA) ASICs are becoming more and more popular for the readout of detector signals, since the sampling frequency of typically several gigasamples per second allows excellent pile-up rejection and time measurements.…

Crilin (Crystal Calorimeter with Longitudinal Information) is a semi-homogeneous, longitudinally segmented electromagnetic calorimeter based on high-$Z$, ultra-fast crystals with UV-extended SiPM readout. The Crilin design has been proposed…

This paper presents the design and characterization of a monolithic integrated circuit (IC) including digital silicon photomultipliers (dSiPMs) arranged in a 32$~\times~$32 pixel matrix at 70$~\mu$m pitch. The IC provides per-quadrant time…

A fast readout system for the upgrade of the COMPASS RICH detector has been developed and successfully used for data taking in 2006 and 2007. The new readout system for the multi-anode PMTs in the central part of the photon detector of the…

We introduce the world's first SPAD family design in 130 nm SiGe BiCMOS process. At 1.8um, we achieved the smallest pitch on record thanks to guard-ring sharing techniques, while keeping a relatively high fill factor of 24.2%. 4x4 SPAD…

This work presents a comprehensive characterization of the FERS 5202 front-end readout unit when processing signals from Silicon Photo-multipliers (SiPMs). The readout system's performance is characterized in terms of its charge resolution,…

Detectors based on pixels with timing capabilities are gaining increasing importance in the last years. Next-to-come high-energy physics experiments at colliders requires the use of time information in tracking, due to the increasing levels…

CMOS pixel sensors (CPS) represent a novel technological approach to building charged particle detectors. CMOS processes allow to integrate a sensing volume and readout electronics in a single silicon die allowing to build sensors with a…

We developed a 55 nm CMOS SRAM chip that scans all data every 125 ns and outputs timestamped soft error data via an SPI interface through a FIFO. The proposed system, consisting of the developed chip and particle detectors, enables…

We report on studies of fast triggering and high-precision tracking using Resistive Plate Chambers (RPCs). Two beam tests were carried out with the 180 GeV muon beam at CERN using RPCs with gas gaps of 1.00 or 1.15 mm and equipped with…

The PICOSEC Micromegas detector can time the arrival of Minimum Ionizing Particles with a sub-25 ps precision. A very good timing resolution in detecting single photons is also demonstrated in laser beams. The PICOSEC timing resolution is…

This paper presents the experimental results of $17~MeV$ proton irradiation on a $60~GHz$ low power, half-duplex transceiver (TRX) chip implemented in $65~nm$ CMOS technology. It supports short range point-to-point data rate up to $6~Gbps$…

We experimentally demonstrate a room-temperature, voltage controlled, short-term quantum photonics memory on a lithium niobate chip. Our chip is capable of resolving 100 ps time steps with 0.74 dB loss per round-trip.

Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM…

Samples of the monolithic silicon pixel ASIC prototype produced in 2022 within the framework of the Horizon 2020 MONOLITH ERC Advanced project were irradiated with 70 MeV protons up to a fluence of 1 x 1016 neq/cm2, and then tested using a…

We present an analog silicon photomultiplier (SiPM) based on a standard 55 nm Bipolar-CMOS-DMOS (BCD) technology. The SiPM is composed of 16$\times$16 single-photon avalanche diodes (SPADs) and measures 0.29$\times$0.32 mm$^2$. Each SPAD…