English
Related papers

Related papers: WideSA: A High Array Utilization Mapping Scheme fo…

200 papers

To overcome the well-known memory bottleneck of AI chips, 3D stacked architectures that employ advanced packaging technology with high-density through-silicon vias (TSVs) pins have proven to be a promising solution. The 3D-stacked AI chip…

Hardware Architecture · Computer Science 2026-04-30 Yiqi Liu , Noelle Crawford , Michael Wang , Jilong Xue , Jian Huang

Abstract argumentation framework (\AFname) is a unifying framework able to encompass a variety of nonmonotonic reasoning approaches, logic programming and computational argumentation. Yet, efficient approaches for most of the decision and…

Artificial Intelligence · Computer Science 2014-11-19 Federico Cerutti , Ilias Tachmazidis , Mauro Vallati , Sotirios Batsakis , Massimiliano Giacomin , Grigoris Antoniou

The computation and memory-intensive nature of DNNs limits their use in many mobile and embedded contexts. Application-specific integrated circuit (ASIC) hardware accelerators employ matrix multiplication units (such as the systolic arrays)…

Hardware Architecture · Computer Science 2024-02-02 Ruiqi Sun , Yinchen Ni , Xin He , Jie Zhao , An Zou

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most existing PIM architectures are either general-purpose but…

Hardware Architecture · Computer Science 2019-07-23 Oscar Castañeda , Maria Bobbett , Alexandra Gallyas-Sanhueza , Christoph Studer

Motivation: Similarity-measure based clustering is a crucial problem appearing throughout scientific data analysis. Recently, a powerful new algorithm called Affinity Propagation (AP) based on message-passing techniques was proposed by Frey…

Quantitative Methods · Quantitative Biology 2007-11-29 Michele Leone , Sumedha , Martin Weigt

Graph Neural Networks (GNNs) have drawn tremendous attention due to their unique capability to extend Machine Learning (ML) approaches to applications broadly-defined as having unstructured data, especially graphs. Compared with other…

Hardware Architecture · Computer Science 2022-06-29 Chengming Zhang , Tong Geng , Anqi Guo , Jiannan Tian , Martin Herbordt , Ang Li , Dingwen Tao

Matrix extensions have emerged as an essential feature in modern CPUs to address the surging demands of AI workloads. However, existing designs often incur substantial hardware and software design overhead. Tight coupling with the CPU…

Hardware Architecture · Computer Science 2026-04-14 Jinpeng Ye , Chongxi Wang , Wenqing Li , Bin Yuan , Shiyi Wang , Fenglu Zhang , Junyu Yue , Jianan Xie , Yunhao Ye , Haoyu Deng , Yingkun Zhou , Xin Cheng , Fuxin Zhang , Jian Wang

Ordered (key-value) maps are an important and widely-used data type for large-scale data processing frameworks. Beyond simple search, insertion and deletion, more advanced operations such as range extraction, filtering, and bulk updates…

Data Structures and Algorithms · Computer Science 2018-03-28 Yihan Sun , Daniel Ferizovic , Guy E. Blelloch

The rise of compound AI serving that integrates multiple operators in a pipeline enables end-user applications such as generative AI-powered meeting companions, autonomous driving, and immersive gaming. These workloads span diverse…

Databases · Computer Science 2026-05-19 Banruo Liu , Wei-Yu Lin , Minghao Fang , Yihan Jiang , Fan Lai

Sequence alignment is a memory bound computation whose performance in modern systems is limited by the memory bandwidth bottleneck. Processing-in-memory architectures alleviate this bottleneck by providing the memory with computing…

Hardware Architecture · Computer Science 2023-03-28 Safaa Diab , Amir Nassereldine , Mohammed Alser , Juan Gómez-Luna , Onur Mutlu , Izzat El Hajj

Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class of such accelerators are so-called processor arrays, which typically integrate a two-dimensional mesh of…

Hardware Architecture · Computer Science 2025-02-18 Dominik Walter , Marita Halm , Daniel Seidel , Indrayudh Ghosh , Christian Heidorn , Frank Hannig , Jürgen Teich

Sparse General Matrix-Matrix Multiplication (SpGEMM) is a fundamental operation in numerous scientific computing and data analytics applications, often bottlenecked by irregular memory access patterns. This paper presents Hash based…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Shiju Li , Younghoon Min , Hane Yie , Hoshik Kim , Soohong Ahn , Joonseop Sim , Chul-Ho Lee , Jongryool Kim

In this paper, we explore a novel image matting task aimed at achieving efficient inference under various computational cost constraints, specifically FLOP limitations, using a single matting network. Existing matting methods which have not…

Computer Vision and Pattern Recognition · Computer Science 2025-03-06 Qinglin Liu , Zonglin Li , Xiaoqian Lv , Xin Sun , Ru Li , Shengping Zhang

Emerging workloads, such as graph processing and machine learning are approximate because of the scale of data involved and the stochastic nature of the underlying algorithms. These algorithms are often distributed over multiple machines…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-12-28 Asim Kadav , Erik Kruus

Heterogeneous reconfigurable platforms with tensor cores, such as AMD ACAP, are increasingly adopted for deep neural network (DNN) inference due to their high throughput and flexibility. However, their suitability for microsecond-scale…

Hardware Architecture · Computer Science 2026-05-27 Shixin Ji , Jinming Zhuang , Zhuoping Yang , Xingzhen Chen , Wei Zhang , Peipei Zhou

In a context of ever-growing worldwide communication traffic, cloud service providers aim at deploying scalable infrastructures to address heterogeneous needs. Part of the network infrastructure, FPGAs are tailored to guarantee low-latency…

Hardware Architecture · Computer Science 2026-01-22 Jean Bruant , Pierre-Henri Horrein , Olivier Muller , Frédéric Pétrot

The Coherent Accelerator Processor Interface (CAPI) is a general term for the infrastructure that provides high throughput and low latency path to the flash storage connected to the IBM POWER 8+ System. CAPI accelerator card is attached…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-17 Kaushik Velusamy , Smriti Prathapan , Milton Halem

Genome sequence analysis is a powerful tool in medical and scientific research. Considering the inevitable sequencing errors and genetic variations, approximate string matching (ASM) has been adopted in practice for genome sequencing.…

Humans have the ability to adapt the type of information they use, the procedure they employ, and the amount of time they spend when solving problems. However, most standard neural networks have a fixed function type and computation budget…

Machine Learning · Computer Science 2023-06-06 Fuzhao Xue , Valerii Likhosherstov , Anurag Arnab , Neil Houlsby , Mostafa Dehghani , Yang You

Transformers are gaining increasing attention across Natural Language Processing (NLP) application domains due to their outstanding accuracy. However, these data-intensive models add significant performance demands to the existing computing…

Hardware Architecture · Computer Science 2025-08-07 Ahmed J. Abdelmaksoud , Shady Agwa , Themis Prodromakis