Related papers: Analog Circuit Sizing Using Machine Learning Based…
Dynamic comparators are an essential part of low-power analog to digital converters (ADCs) and are referred to as one of the most important building blocks in mixed mode circuits. The power consumption and accuracy of dynamic comparators…
We introduce a microwave circuit architecture for quantum signal processing combining design principles borrowed from high-Q 3D resonators in the quantum regime and from planar structures fabricated with standard lithography. The resulting…
This letter analyzes the scaling property of nanowire (NW) phase change memory (PCM) using analytic and numerical methods. The scaling scenarios of the three widely-used NW PCM peration schemes (constant electric field, voltage, and…
Using memristive properties common for the titanium dioxide thin film devices, we designed a simple write algorithm to tune device conductance at a specific bias point to 1% relative accuracy (which is roughly equivalent to 7-bit precision)…
In this paper, we provide a system level perspective on the design of control electronics for large scale quantum systems. Quantum computing systems with high-fidelity control and readout, coherent coupling, calibrated gates, and…
A circuit-simulation-based method is used to determine the thermally-induced bit error rate of superconducting logic circuits. Simulations are used to evaluate the multidimensional Gaussian integral across noise current sources attached to…
The continued desire for X-ray pixel detectors with higher frame rates will stress the ability of application-specific integrated circuit (ASIC) designers to provide sufficient off-chip bandwidth to reach continuous frame rates in the 1 MHz…
Quantum sensing is an important application of emerging quantum technologies. We explore whether a hybrid system of quantum sensors and quantum circuits can surpass the classical limit of sensing. In particular, we use optimization…
We present a tool flow and results for a model-based hardware design for FPGAs from Simulink descriptions which nicely integrates into existing environments. While current commercial tools do not exploit some high-level optimizations, we…
Using accurate dissipative DFT-NEGF atomistic-simulation techniques within the Wannier-Function formalism, we give a fresh look at the possibility of sub-10 nm scaling for high-performance CMOS applications. We show that a combination of…
The progress of the Internet of Things(IoT) technologies and applications requires the efficient low power circuits and architectures to maintain and improve the performance of the increasingly growing data processing systems. Memristive…
The present article primarily focuses on the design of an ultra-low-noise amplifier specifically tailored for quantum applications. The circuit design places a significant emphasis on improving the noise figure, as quantum-associated…
This paper proposes a low-power and low-noise instrumentation amplifier (IA) tailored for bioimpedance sensing applications. The design originates from a gain-boosted flipped voltage follower (FVF) transconductance (TC) stage and integrates…
Approximate circuits trading the power consumption for the quality of results play a key role in the development of energy-aware systems. Designing complex approximate circuits is, however, a very difficult and computationally demanding…
The true-differential superconductor on-chip amplifier has complementary outputs that float with respect to chip ground. This improves signal integrity and compatibility with the receiving semiconductor stage. Both source-terminated and…
The operation of a typical common emitter amplifier, including negative feedback, is studied taking into account the non-linearity characteristic of real-world transistors. This has been accomplished by employing a recently proposed Early…
Transistors are the cornerstone of modern electronics. Yet, their relatively complex characteristics, allied with often observed great parameter variation, remain a challenge for discrete and integrated electronics. Much of transistor…
This paper focuses on robust transceiver design for throughput enhancement on the interference channel (IC), under imperfect channel state information (CSI). In this paper, two algorithms are proposed to improve the throughput of the…
This paper introduces a robust Pareto design approach for transistor sizing of Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs), particularly for power amplifier (PA) and low-noise amplifier (LNA) designs in 5G applications.…
In the noisy intermediate-scale quantum era, mid-circuit measurement and reset operations facilitate novel circuit optimization strategies by reducing a circuit's qubit count in a method called resizing. This paper introduces two such…