English
Related papers

Related papers: SSR: Spatial Sequential Hybrid Architecture for La…

200 papers

Data-driven methods are emerging as efficient alternatives to traditional numerical forecasting, offering fast inference and lower computational cost. Yet, for complex systems, long-term accuracy often deteriorates due to error…

Machine Learning · Computer Science 2025-09-03 Hao Zhou , Sibo Cheng

AI-powered edge devices currently lack the ability to adapt their embedded inference models to the ever-changing environment. To tackle this issue, Continual Learning (CL) strategies aim at incrementally improving the decision capabilities…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-28 Leonardo Ravaglia , Manuele Rusci , Alessandro Capotondi , Francesco Conti , Lorenzo Pellegrini , Vincenzo Lomonaco , Davide Maltoni , Luca Benini

Performing Retrieval-Augmented Generation (RAG) directly on mobile devices is promising for data privacy and responsiveness but is hindered by the architectural constraints of mobile NPUs. Specifically, current hardware struggles with the…

Computation and Language · Computer Science 2025-12-18 Zhiyang Chen , Daliang Xu , Haiyang Shen , Chiheng Lou , Mengwei Xu , Shangguang Wang , Xin Jin , Yun Ma

Recent advancements in large language models (LLMs) boasting billions of parameters have generated a significant demand for efficient deployment in inference workloads. The majority of existing approaches rely on temporal architectures that…

Machine Learning · Computer Science 2024-04-09 Hongzheng Chen , Jiahao Zhang , Yixiao Du , Shaojie Xiang , Zichao Yue , Niansong Zhang , Yaohui Cai , Zhiru Zhang

This paper presents SHARP (Supercomputing for High-speed Avoidance and Reactive Planning), a proof-of-concept study demonstrating how high-performance computing (HPC) can enable millisecond-scale responsiveness in robotic control. While…

Spatially partitioned heterogeneous accelerators (HAs) are increasingly adopted in embedded systems for their performance and flexibility. Yet most existing HA design frameworks optimize primarily for throughput or quality-of-service (QoS)…

Hardware Architecture · Computer Science 2026-04-08 Shixin Ji , Jinming Zhuang , Sarah Schultz , Zhuoping Yang , Xingzhen Chen , Zheng Dong , Alex K. Jones , Yihui Ren , Peipei Zhou

Multi-Access Point Coordination (MAPC) is becoming the cornerstone of the IEEE 802.11bn amendment, alias Wi-Fi 8. Among the MAPC features, Coordinated Spatial Reuse (C-SR) stands as one of the most appealing due to its capability to…

Networking and Internet Architecture · Computer Science 2023-10-20 Francesc Wilhelmi , Lorenzo Galati-Giordano , Giovanni Geraci , Boris Bellalta , Gianluca Fontanesi , David Nuñez

In computation-intensive domains such as digital signal processing, encryption, and neural networks, the performance of arithmetic units, including adders and multipliers, is pivotal. Conventional numerical systems often fall short of…

Hardware Architecture · Computer Science 2024-08-13 Soudabeh Mousavi , Dara Rahmati , Saeid Gorgin , Jeong-A Lee

We propose a novel solid-state disk (SSD) architecture that utilizes a double-data-rate synchronous NAND flash interface for improving read and write performance. Unlike the conventional design, the data transfer rate in the proposed design…

Hardware Architecture · Computer Science 2015-02-10 Eui-Young Chung , Chang-Il Son , Kwanhu Bang , Dong Kim , Soong-Mann Shin , Sungroh Yoon

This paper presents a programmable in-memory-computing processor, demonstrated in a 65nm CMOS technology. For data-centric workloads, such as deep neural networks, data movement often dominates when implemented with today's computing…

Hardware Architecture · Computer Science 2020-09-17 Hongyang Jia , Yinqi Tang , Hossein Valavi , Jintao Zhang , Naveen Verma

In this paper, we demonstrate the design of efficient and high-performance AI/Deep Learning accelerators with customized STT-MRAM and a reconfigurable core. Based on model-driven detailed design space exploration, we present the design…

Hardware Architecture · Computer Science 2021-04-07 Kaniz Mishty , Mehdi Sadi

RAPID-LLM is a unified performance modeling framework for large language model (LLM) training and inference on GPU clusters. It couples a DeepFlow-based frontend that generates hardware-aware, operator-level Chakra execution traces from an…

Space Cyber-Physical Systems (S-CPS) such as spacecraft and satellites strongly rely on the reliability of onboard computers to guarantee the success of their missions. Relying solely on radiation-hardened technologies is extremely…

Systems and Control · Electrical Eng. & Systems 2024-01-12 Michael Rogenmoser , Yvan Tortorella , Davide Rossi , Francesco Conti , Luca Benini

Growing deployment of power and energy efficient throughput accelerators (GPU) in data centers demands enhancement of power-performance co-optimization capabilities of GPUs. Realization of exascale computing using accelerators requires…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-06 Nilanjan Goswami , Amer Qouneh , Chao Li , Tao Li

End-to-end automatic speech recognition (ASR) systems based on transformer architectures, such as Whisper, offer high transcription accuracy and robustness. However, their autoregressive decoding is computationally expensive, hence limiting…

Computation and Language · Computer Science 2025-07-30 Tuan Vu Ho , Hiroaki Kokubo , Masaaki Yamamoto , Yohei Kawaguchi

Path planning is critical for autonomous driving, generating smooth, collision-free, feasible paths based on perception and localization inputs. However, its computationally intensive nature poses significant challenges for…

Hardware Architecture · Computer Science 2025-07-23 Yifan Zhang , Xiaoyu Niu , Hongzheng Tian , Yanjun Zhang , Bo Yu , Shaoshan Liu , Sitao Huang

Generative Large Language Models (LLMs) based on the Transformer architecture have recently emerged as a dominant foundation model for a wide range of Natural Language Processing tasks. Nevertheless, their application in real-time scenarios…

Computation and Language · Computer Science 2024-01-04 Coleman Hooper , Sehoon Kim , Hiva Mohammadzadeh , Hasan Genc , Kurt Keutzer , Amir Gholami , Sophia Shao

Efficiently scaling deep neural networks across GPU clusters requires navigating complex trade-offs between computational throughput, memory utilization, and synchronization overhead. This paper presents a unified empirical evaluation of…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-01-06 Md Sultanul Islam Ovi

Spiking Neural Networks (SNNs) offer a promising alternative to Artificial Neural Networks (ANNs) for deep learning applications, particularly in resource-constrained systems. This is largely due to their inherent sparsity, influenced by…

Hardware Architecture · Computer Science 2023-10-27 Ilkin Aliyev. Kama Svoboda , Tosiron Adegbija

Sparse matrix multiplication is an important component of linear algebra computations. In this paper, an architecture based on Content Addressable Memory (CAM) and Resistive Content Addressable Memory (ReCAM) is proposed for accelerating…

Hardware Architecture · Computer Science 2017-05-30 Leonid Yavits , Ran Ginosar
‹ Prev 1 4 5 6 7 8 10 Next ›