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This work introduces MICSim, an open-source, pre-circuit simulator designed for early-stage evaluation of chip-level software performance and hardware overhead of mixed-signal compute-in-memory (CIM) accelerators. MICSim features a modular…

Artificial Intelligence · Computer Science 2024-12-18 Cong Wang , Zeming Chen , Shanshi Huang

The performance of today's in-memory indexes is bottlenecked by the memory latency/bandwidth wall. Processing-in-memory (PIM) is an emerging approach that potentially mitigates this bottleneck, by enabling low-latency memory access whose…

Large-scale AI training and inference require hundreds of gigabytes to terabytes of DRAM with high peak to average utilization ratios, resulting in overprovisioning. In cloud computing, DRAM constitutes a significant share of the cost. Yet,…

Hardware Architecture · Computer Science 2026-05-28 Kaustav Goswami , Maryam Babaie , Hoa Nguyen , Venkatesh Akella , Jason Lowe-Power

Optimizing CUDA code across multiple generations of GPU architectures is challenging, as achieving peak performance requires an extensive exploration of an increasingly complex, hardware-specific optimization space. Traditional compilers…

Benefiting from the self-attention mechanism, Transformer models have attained impressive contextual comprehension capabilities for lengthy texts. The requirements of high-throughput inference arise as the large language models (LLMs)…

Hardware Architecture · Computer Science 2024-07-16 Huizheng Wang , Jiahao Fang , Xinru Tang , Zhiheng Yue , Jinxi Li , Yubin Qin , Sihan Guan , Qize Yang , Yang Wang , Chao Li , Yang Hu , Shouyi Yin

General-purpose compilers abstract away parallelism, locality, and synchronization, limiting their effectiveness on modern spatial architectures. As modern computing architectures increasingly rely on fine-grained control over data…

RRAM-based multi-core systems improve the energy efficiency and performance of CNNs. Thereby, the distributed parallel execution of convolutional layers causes critical data dependencies that limit the potential speedup. This paper presents…

Hardware Architecture · Computer Science 2023-10-27 Rebecca Pelke , Nils Bosbach , Jose Cubero , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

To usher in the next round of client AI innovation, there is an urgent need to enable efficient, lossless inference of high-accuracy large language models (LLMs) and vision language models (VLMs), jointly referred to as xLMs, on client…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-30 Aditya Ukarande , Deep Shekhar , Marc Blackstein , Ram Rangan

CXL has been the emerging technology for expanding memory for both the host CPU and device accelerators with load/store interface. Extending memory coherency to the PCIe root complex makes the codesign more flexible in that you can access…

Hardware Architecture · Computer Science 2023-09-11 Yiwei Yang

The full-size MLPs and the projection layers in attention introduce tremendous model sizes of large language models (LLMs), consuming extensive computational resources in pre-training. We empirically observe that the activations of…

Machine Learning · Computer Science 2025-10-03 Ziyue Liu , Ruijie Zhang , Zhengyang Wang , Mingsong Yan , Zi Yang , Paul Hovland , Bogdan Nicolae , Franck Cappello , Sui Tang , Zheng Zhang

The rapid growth of deep neural network (DNN) workloads has significantly increased the demand for large-capacity on-chip SRAM in machine learning (ML) applications, with SRAM arrays now occupying a substantial fraction of the total die…

Hardware Architecture · Computer Science 2025-12-30 Subhradip Chakraborty , Ankur Singh , Xuming Chen , Gourav Datta , Akhilesh R. Jaiswal

In the era of LLMs, dense operations such as GEMM and MHA are critical components. These operations are well-suited for parallel execution using a tilebased approach. While traditional GPU programming often relies on low level interfaces…

Computation and Language · Computer Science 2025-03-27 Dewei Wang , Wei Zhu , Liyang Ling , Ettore Tiotto , Quintin Wang , Whitney Tsang , Julian Opperman , Jacky Deng

Compute-in-memory (CIM) based neural network accelerators offer a promising solution to the Von Neumann bottleneck by computing directly within memory arrays. However, SRAM CIM faces limitations in executing larger models due to its cell…

Hardware Architecture · Computer Science 2025-04-16 Shurui Li , Puneet Gupta

Large language models (LLMs) rely on self-attention for contextual understanding, demanding high-throughput inference and large-scale token parallelism (LTPP). Existing dynamic sparsity accelerators falter under LTPP scenarios due to…

Hardware Architecture · Computer Science 2025-12-25 Huizheng Wang , Taiquan Wei , Hongbin Wang , Zichuan Wang , Xinru Tang , Zhiheng Yue , Shaojun Wei , Yang Hu , Shouyi Yin

The SIMT execution model is commonly used for general GPU development. CUDA and OpenCL developers write scalar code that is implicitly parallelized by compiler and hardware. On Intel GPUs, however, this abstraction has profound performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-28 Guei-Yuan Lueh , Kaiyu Chen , Gang Chen , Joel Fuentes , Wei-Yu Chen , Fangwen Fu , Hong Jiang , Hongzheng Li , Daniel Rhee

Processing large-scale graph datasets is computationally intensive and time-consuming. Processor-centric CPU and GPU architectures, commonly used for graph applications, often face bottlenecks caused by extensive data movement between the…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-11 Marzieh Barkhordar , Alireza Tabatabaeian , Mohammad Sadrosadati , Christina Giannoula , Juan Gomez Luna , Izzat El Hajj , Onur Mutlu , Alaa R. Alameldeen

The rapid growth of deep learning has driven exponential increases in model parameters and computational demands. NVIDIA GPUs and their CUDA-based software ecosystem provide robust support for parallel computing, significantly alleviating…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-08 Jiaqi Lv , Xufeng He , Yanchen Liu , Xu Dai , Aocheng Shen , Yinghao Li , Jiachen Hao , Jianrong Ding , Yang Hu , Shouyi Yin

Processing in Memory (PIM) is a computing paradigm that promises enormous gain in processing speed by eradicating latencies in the typical von Neumann architecture. It has gained popularity owing to its throughput by embedding storage and…

Emerging Technologies · Computer Science 2016-02-09 P. P. Chougule , B. Sen , R. Mukherjee , V. C. Karade , P. S. Patil , T. D. Dongale , R. K. Kamat

Modern online large language model (LLM) services, such as Retrieval-Augmented Generation (RAG) and agent systems, increasingly expose two prominent characteristics: prompt segmentation (e.g., system instructions, retrieved passages, tool…

Machine Learning · Computer Science 2026-05-12 Xingyu Qu , Tianhao Lin , Yiqi Li , Zhiyu Chen , Sheng Wang

Crary and Sullivan's Relaxed Memory Calculus (RMC) proposed a new declarative approach for writing low-level shared memory concurrent programs in the presence of modern relaxed-memory multi-processor architectures and optimizing compilers.…

Programming Languages · Computer Science 2019-04-12 Michael J. Sullivan , Karl Crary , Salil Joshi