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Optimizing resource utilization in target platforms is key to achieving high performance during DNN inference. While optimizations have been proposed for inference latency, memory footprint, and energy consumption, prior hardware-aware…

Machine Learning · Computer Science 2022-03-24 Ahmet Caner Yüzügüler , Nikolaos Dimitriadis , Pascal Frossard

Ensuring the confidentiality and integrity of DNN accelerators is paramount across various scenarios spanning autonomous driving, healthcare, and finance. However, current security approaches typically require extensive hardware resources,…

Hardware Architecture · Computer Science 2025-08-27 Wei Xuan , Zhongrui Wang , Lang Feng , Ning Lin , Zihao Xuan , Rongliang Fu , Tsung-Yi Ho , Yuzhong Jiao , Luhong Liang

In view of the performance limitations of fully-decoupled designs for neural architectures and accelerators, hardware-software co-design has been emerging to fully reap the benefits of flexible design spaces and optimize neural network…

Hardware Architecture · Computer Science 2022-03-29 Bingqian Lu , Zheyu Yan , Yiyu Shi , Shaolei Ren

Deep Neural Networks (DNNs) have shown excellent performance in a wide range of machine learning applications. Knowing the latency of running a DNN model or tensor program on a specific device is useful in various tasks, such as DNN graph-…

Machine Learning · Computer Science 2023-11-20 Hanpeng Hu , Junwei Su , Juntao Zhao , Yanghua Peng , Yibo Zhu , Haibin Lin , Chuan Wu

Clustering is a fundamental task in machine learning. One of the most successful and broadly used algorithms is DBSCAN, a density-based clustering algorithm. DBSCAN requires $\epsilon$-nearest neighbor graphs of the input dataset, which are…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-12 Youguang Chen , William Ruys , George Biros

The growing demand for multi-DNN workloads with unpredictable task arrival times has highlighted the need for interruptible scheduling on edge accelerators. However, existing preemptive frameworks typically assume known task arrival times…

Hardware Architecture · Computer Science 2026-03-24 Boran Zhao , Hetian Liu , Zihang Yuan , Yanbin Hu , Wenzhe Zhao , Tian Xia , Pengju Ren

Deep neural networks (DNNs) have made breakthroughs in various fields including image recognition and language processing. DNNs execute hundreds of millions of multiply-and-accumulate (MAC) operations. To efficiently accelerate such…

Systems and Control · Electrical Eng. & Systems 2024-07-08 Amro Eldebiky , Grace Li Zhang , Xunzhao Yin , Cheng Zhuo , Ing-Chao Lin , Ulf Schlichtmann , Bing Li

As custom hardware accelerators become more prevalent, it becomes increasingly important to automatically generate efficient host-driver code that can fully leverage the capabilities of these accelerators. This approach saves time and…

Programming Languages · Computer Science 2024-03-01 Jude Haris , Nicolas Bohm Agostini , Antonino Tumeo , David Kaeli , José Cano

Precision scaling has emerged as a popular technique to optimize the compute and storage requirements of Deep Neural Networks (DNNs). Efforts toward creating ultra-low-precision (sub-8-bit) DNNs suggest that the minimum precision required…

Machine Learning · Computer Science 2021-11-01 Reena Elangovan , Shubham Jain , Anand Raghunathan

Near-data accelerators (NDAs) that are integrated with main memory have the potential for significant power and performance benefits. Fully realizing these benefits requires the large available memory capacity to be shared between the host…

Hardware Architecture · Computer Science 2020-12-02 Benjamin Y. Cho , Yongkee Kwon , Sangkug Lym , Mattan Erez

Sparse code multiple access (SCMA) has been one of non-orthogonal multiple access (NOMA) schemes aiming to support high spectral efficiency and ubiquitous access requirements for 5G wireless communication networks. Conventional SCMA…

Signal Processing · Electrical Eng. & Systems 2019-06-20 Jinzhi Lin , Shengzhong Feng , Zhile Yang , Yun Zhang , Yong Zhang

Auto-scheduling for tensor programs is a process where a search algorithm automatically explores candidate schedules (program transformations) for a given program on a target hardware platform to improve its performance. However this can be…

Machine Learning · Computer Science 2022-09-08 Perry Gibson , José Cano

Many convolutional neural network (CNN) accelerators face performance- and energy-efficiency challenges which are crucial for embedded implementations, due to high DRAM access latency and energy. Recently, some DRAM architectures have been…

Hardware Architecture · Computer Science 2023-03-06 Rachmad Vidya Wicaksana Putra , Muhammad Abdullah Hanif , Muhammad Shafique

This work proposes a novel Energy-Aware Network Operator Search (ENOS) approach to address the energy-accuracy trade-offs of a deep neural network (DNN) accelerator. In recent years, novel inference operators have been proposed to improve…

Systems and Control · Electrical Eng. & Systems 2021-04-13 Shamma Nasrin , Ahish Shylendra , Yuti Kadakia , Nick Iliev , Wilfred Gomes , Theja Tulabandhula , Amit Ranjan Trivedi

Contemporary Deep Neural Network (DNN) contains millions of synaptic connections with tens to hundreds of layers. The large computation and memory requirements pose a challenge to the hardware design. In this work, we leverage the intrinsic…

Machine Learning · Computer Science 2017-11-07 Jingyang Zhu , Jingbo Jiang , Xizi Chen , Chi-Ying Tsui

Computation and Data Reuse is critical for the resource-limited Convolutional Neural Network (CNN) accelerators. This paper presents Universal Computation Reuse to exploit weight sparsity, repetition, and similarity simultaneously in a…

Hardware Architecture · Computer Science 2021-04-21 Alireza Khadem , Haojie Ye , Trevor Mudge

In-memory computing (IMC) with non-volatile memories (NVMs) has emerged as a promising approach to address the rapidly growing computational demands of Deep Neural Networks (DNNs). Mapping DNN layers spatially onto NVM-based IMC…

Hardware Architecture · Computer Science 2023-12-07 Abinand Nallathambi , Christin David Bose , Wilfried Haensch , Anand Raghunathan

Machine learning (ML) models are widely used in many important domains. For efficiently processing these computational- and memory-intensive applications, tensors of these over-parameterized models are compressed by leveraging sparsity,…

Hardware Architecture · Computer Science 2021-08-11 Shail Dave , Riyadh Baghdadi , Tony Nowatzki , Sasikanth Avancha , Aviral Shrivastava , Baoxin Li

Training time budget and size of the dataset are among the factors affecting the performance of a Deep Neural Network (DNN). This paper shows that Neural Architecture Search (NAS), Hyper Parameters Optimization (HPO), and Data Augmentation…

Machine Learning · Computer Science 2023-01-24 Mahdi Zolnouri , Dounia Lakhmiri , Christophe Tribes , Eyyüb Sari , Sébastien Le Digabel

GPUs have become the \emph{defacto} hardware devices for accelerating Deep Neural Network (DNN) inference workloads. However, the conventional \emph{sequential execution mode of DNN operators} in mainstream deep learning frameworks cannot…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-05-31 Aodong Chen , Fei Xu , Li Han , Yuan Dong , Li Chen , Zhi Zhou , Fangming Liu
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