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Reliability is an important requirement for both communication and storage systems. Due to continuous scale down of technology multiple adjacent bits error probability increases. The data may be corrupted due soft errors. Error correction…

Hardware Architecture · Computer Science 2020-02-19 Sayan Tripathi , Jhilam Jana , Jaydeb Bhaumik

Efficient low complexity error correcting code(ECC) is considered as an effective technique for mitigation of multi-bit upset (MBU) in the configuration memory(CM)of static random access memory (SRAM) based Field Programmable Gate Array…

Hardware Architecture · Computer Science 2018-10-24 Swagata Mandal , Sreetama Sarkar , Wong Ming Ming , Anupam Chattopadhyay , Amlan Chakrabarti

Modern Deep Learning (DL) workloads are increasingly deployed in safety-critical domains, such as automotive systems and hyperscale data centers, where transient hardware faults pose a serious threat to system reliability. These workloads…

Hardware Architecture · Computer Science 2026-05-11 Mohammad Hasan Ahmadilivani , Marten Roots , Marco Restifo , Sven-Markus Loorits , Luca Di Mauro , Jaan Raik

Embedded RAM blocks (BRAMs) in field programmable gate arrays (FPGAs) are susceptible to single event effects (SEEs) induced by environmental factors such as cosmic rays, heavy ions, alpha particles and so on. As technology scales, the…

Instrumentation and Detectors · Physics 2016-08-03 Zhenlei Yang , Xiaohui Wang , Zhangang Zhang , Jie Liu , Hong Su

Voltage underscaling below the nominal level is an effective solution for improving energy efficiency in digital circuits, e.g., Field Programmable Gate Arrays (FPGAs). However, further undervolting below a safe voltage level and without…

Hardware Architecture · Computer Science 2019-04-01 Behzad Salami , Osman S. Unsal , Adrian Cristal Kestelman

Reliability is fundamental for developing large-scale quantum computers. Since the benefit of technological advancements to the qubit's stability is saturating, algorithmic solutions, such as quantum error correction (QEC) codes, are needed…

Quantum Physics · Physics 2025-06-23 Marzio Vallero , Gioele Casagranda , Flavio Vella , Paolo Rech

Improvements in main memory storage density are primarily driven by process technology scaling, which negatively impacts reliability by exacerbating various circuit-level error mechanisms. To compensate for growing error rates, both memory…

Hardware Architecture · Computer Science 2022-04-25 Minesh Patel

Field Programmable Gate Arrays (FPGAs) are more prone to be affected by transient faults in presence of radiation and other environmental hazards compared to Application Specific Integrated Circuits (ASICs). Hence, error mitigation and…

Hardware Architecture · Computer Science 2015-09-24 Swagata Mandal , Rourab Paul , Suman Sau , Amlan Chakrabarti , Subhasis Chattopadhyay

Powerful Forward Error Correction (FEC) schemes are used in optical communications to achieve bit-error rates below $10^{-15}$. These FECs follow one of two approaches: concatenation of simpler hard-decision codes or usage of inherently…

Hardware Architecture · Computer Science 2017-09-01 Carlo Condo , Pascal Giard , François Leduc-Primeau , Gabi Sarkis , Warren J. Gross

Chip Guard is a new approach to symbol-correcting error correction codes. It can be scaled to various data burst sizes and reliability levels. A specific version for DDR5 is described. It uses the usual DDR5 configuration of 8 data chips,…

Hardware Architecture · Computer Science 2023-01-19 Tanj Bennett

Quantum computers have the potential to solve certain complex problems in a much more efficient way than classical computers. Nevertheless, current quantum computer implementations are limited by high physical error rates. This issue is…

Quantum Physics · Physics 2026-04-29 Alessio Cicero , Luigi Altamura , Moritz Lange , Mats Granath , Pedro Trancoso

When neural networks (NeuralNets) are implemented in hardware, their weights need to be stored in memory devices. As noise accumulates in the stored weights, the NeuralNet's performance will degrade. This paper studies how to use error…

Information Theory · Computer Science 2020-01-14 Kunping Huang , Paul Siegel , Anxiao , Jiang

With the ever-growing storage density, high-speed, and low-cost data access, flash memory has inevitably become popular. Multi-level cell (MLC) NAND flash memory, which can well balance the data density and memory stability, has occupied…

Hardware Architecture · Computer Science 2018-02-14 Haochuan Song , Frankie Fu , Cloud Zeng , Jin Sha , Zaichen Zhang , Xiaohu You , Chuan Zhang

Spin Transfer Torque MRAMs are attractive due to their non-volatility, high density and zero leakage. However, STT-MRAMs suffer from poor reliability due to shared read and write paths. Additionally, conflicting requirements for data…

Other Computer Science · Computer Science 2016-06-20 Zoha Pajouhi , Xuanyao Fong , Anand Raghunathan , Kaushik Roy

Next-generation wireless communication systems impose much stricter requirements for transmission rate, latency, and reliability. The peak data rate of 6G networks should be no less than 1 Tb/s, which is comparable to existing long-haul…

Information Theory · Computer Science 2024-10-28 Kirill Andreev , Pavel Rybin , Alexey Frolov

Modern DRAM modules are often equipped with hardware error correction capabilities, especially for DRAM deployed in large-scale data centers, as process technology scaling has increased the susceptibility of these devices to errors. To…

Hardware Architecture · Computer Science 2017-06-29 Yixin Luo , Saugata Ghose , Tianshi Li , Sriram Govindan , Bikash Sharma , Bryan Kelly , Amirali Boroumand , Onur Mutlu

Large-scale datacenters often experience memory failures, where Uncorrectable Errors (UEs) highlight critical malfunction in Dual Inline Memory Modules (DIMMs). Existing approaches primarily utilize Correctable Errors (CEs) to predict UEs,…

Hardware Architecture · Computer Science 2024-12-17 Qiao Yu , Wengui Zhang , Min Zhou , Jialiang Yu , Zhenli Sheng , Jasmin Bogatinovski , Jorge Cardoso , Odej Kao

Large-scale quantum computers will inevitably need quantum error correction (QEC) to protect information against decoherence. Given that the overhead of such error correction is often formidable, autonomous quantum error correction (AQEC)…

Quantum Physics · Physics 2024-01-11 Ziqian Li , Tanay Roy , David Rodríguez Pérez , David I. Schuster , Eliot Kapit

Quantum error correction (QEC) is essential for achieving low error rates required for fault-tolerant quantum computation. In stabilizer-based codes such as the surface code, errors are inferred from repeated syndrome measurements and…

Reducing the threshold voltage of electronic devices increases their sensitivity to electromagnetic radiation dramatically, increasing the probability of changing the memory cells' content. Designers mitigate failures using techniques such…

Hardware Architecture · Computer Science 2023-07-14 David Freitas , David Mota , Clailton Lopes , Daniel Simões , Jarbas Silveira , João Mota , César Marcon
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