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Related papers: Towards a RISC-V Open Platform for Next-generation…

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This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification in a Rocket chip core. To perform a meaningful evaluation for modern…

Hardware Architecture · Computer Science 2021-08-17 Bruno Sá , José Martins , Sandro Pinto

The new open and royalty-free RISC-V ISA is attracting interest across the whole computing continuum, from microcontrollers to supercomputers. High-performance RISC-V processors and accelerators have been announced, but RISC-V-based HPC…

The automotive industry is transitioning from traditional ECU-based systems to software-defined vehicles. A central role of this revolution is played by containers, lightweight virtualization technologies that enable the flexible…

The CMOS integrated chips at advanced technology nodes are becoming more vulnerable to various sources of faults like manufacturing imprecisions, variations, aging, etc. Additionally, the intentional fault attacks (e.g., high power…

Hardware Architecture · Computer Science 2018-07-08 Naveen Kumar Macha , Bhavana Tejaswini Repalle , Sandeep Geedipally , Rafael Rios , Mostafizur Rahman

RISC-V's limited security features hinder its use in confidential computing and heterogeneous platforms. This paper introduces RISecure-PUF, a security extension utilizing existing Physical Unclonable Functions for key generation and secure…

Cryptography and Security · Computer Science 2024-11-22 Chenghao Chen , Xiaolin Zhang , Kailun Qin , Tengfei Wang , Yipeng Shi , Tianyi Huang , Chi Zhang , Dawu Gu

A range of RISC-V based accelerators are available and coming to market, and there is strong potential for these to be used for High Performance Computing (HPC) workloads. However, such accelerators tend to provide bespoke programming…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-03 Nick Brown , Jake Davies , Felix LeClair

When academic researchers develop and validate autonomous driving algorithms, there is a challenge in balancing high-performance capabilities with the cost and complexity of the vehicle platform. Much of today's research on autonomous…

Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable…

Hardware Architecture · Computer Science 2022-09-05 Gianna Paulin , Matheus Cavalcante , Paul Scheffler , Luca Bertaccini , Yichao Zhang , Frank Gürkaynak , Luca Benini

The evolution of 5G and the emergence of 6G wireless communication systems impose higher demands for computing capabilities and lower power consumption in the front-end and processing circuitry. Furthermore, the incorporation of Artificial…

Signal Processing · Electrical Eng. & Systems 2025-06-10 Javier Acevedo , Frank H. P. Fitzek

Advanced Driver-Assistance Systems (ADAS) is one of the primary drivers behind increasing levels of autonomy, driving comfort in this age of connected mobility. However, the performance of such systems is a function of execution rate which…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-14 Anirban Ghose , Srijeeta Maity , Arijit Kar , Kaustubh Maloo , Soumyajit Dey

On the advent of the slow death of Moore's law, the silicon industry is moving towards a new era of chiplets. The automotive industry is experiencing a profound transformation towards software-defined vehicles, fueled by the surging demand…

This report makes the case that a well-designed Reduced Instruction Set Computer (RISC) can match, and even exceed, the performance and code density of existing commercial Complex Instruction Set Computers (CISC) while maintaining the…

Hardware Architecture · Computer Science 2016-07-11 Christopher Celio , Palmer Dabbelt , David A. Patterson , Krste Asanović

This work presents a SystemC-TLM based simulator for a RISC-V microcontroller. This simulator is focused on simplicity and easy expandable of a RISC-V. It is built around a full RISC-V instruction set simulator that supports full RISC-V ISA…

Hardware Architecture · Computer Science 2020-10-21 Màrius Montón

Scaling bottlenecks the making of digital quantum computers, posing challenges from both the quantum and the classical components. We present a classical architecture to cope with a comprehensive list of the latter challenges {\em all at…

The automobile industry is no longer relying on pure mechanical systems; instead, it benefits from advanced Electronic Control Units (ECUs) in order to provide new and complex functionalities in the effort to move toward fully connected…

Cryptography and Security · Computer Science 2022-03-09 Franco Oberti , Alessandro Savino , Ernesto Sanchez , Filippo Parisi , Stefano Di Carlo

Address translation and protection play important roles in today's processors, supporting multiprocessing and enforcing security. Historically, the design of the address translation mechanisms has been closely tied to the instruction set.…

Hardware Architecture · Computer Science 2019-05-17 Xuan Guo , Robert Mullins

The technological advancements of recent years have steadily increased the complexity of vehicle-internal software systems, and the ongoing development towards autonomous driving will further aggravate this situation. This is leading to a…

Software Engineering · Computer Science 2019-08-14 Jannik Lotz , Andreas Vogelsang , Ola Benderius , Christian Berger

To ensure secure and trustworthy execution of applications, vendors frequently embed trusted execution environments into their systems. Here, applications are protected from adversaries, including a malicious operating system. TEEs are…

Cryptography and Security · Computer Science 2021-03-10 Pascal Nasahl , Robert Schilling , Mario Werner , Stefan Mangard

Connected Vehicles (CVs) can leverage the unique features of 5G and future 6G/NextG networks to enhance Intelligent Transportation System (ITS) services. However, even with advancements in cellular network generations, CV applications may…

Networking and Internet Architecture · Computer Science 2024-12-31 Maria Barbosa , Kelvin Dias

The proliferation of edge devices necessitates efficient computational architectures for lightweight tasks, particularly deep neural network (DNN) inference. Traditional NPUs, though effective for such operations, face challenges in power,…

Hardware Architecture · Computer Science 2024-07-04 Won Hyeok Kim , Hyeong Jin Kim , Tae Hee Han
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