Related papers: A Novel Fault-Tolerant Logic Style with Self-Check…
Gate-all-around Vertical Nanowire Field Effect Transistors (VNWFET) are emerging devices, which are well suited to pursue scaling beyond lateral scaling limitations around 7nm. This work explores the relative merits and drawbacks of the…
Junctionless oxide-based neuron thin-film transistors with in-plane-gate structure are fabricated at room temperature with a laser scribing process. The neuron transistors are composed of a bottom ITO floating gate and multiples of two…
Over the last decade, memristive devices have been widely adopted in computing for various conventional and unconventional applications. While the integration density, memory property, and nonlinear characteristics have many benefits,…
Single-event upset (SEU) fault tolerance for systems-on-chip (SoCs) in radiation-heavy environments is often addressed by architectural fault-tolerance approaches protecting individual SoC components (e.g., cores, memories) in isolation.…
Monolithic three-dimensional integration of memory and logic circuits could dramatically improve performance and energy efficiency of computing systems. Some conventional and emerging memories are suitable for vertical integration,…
We propose hardware-efficient schemes for implementing logical H and S gates transversally on rotated surface codes with reconfigurable neutral atom arrays. For logical H gates, we develop a simple strategy to rotate code patches…
Multi-valued logic gates, which can handle quaternary numbers as inputs, are developed by exploiting the ballistic transport properties of quantum point contacts in series. The principle of a logic gate that finds the minimum of two…
Quantum error correction represents a significant advancement in large-scale quantum computing. However, achieving fault-tolerant implementations of non-Clifford logical gates with reduced overhead remains a challenge in the popular surface…
Fault-tolerant quantum error correction provides a strategy to protect information processed by a quantum computer against noise which would otherwise corrupt the data. A fault-tolerant universal quantum computer must implement a universal…
Reversible logic is experience renewed interest as we are approach the limits of CMOS technologies. While physical implementations of reversible gates have yet to materialize, it is safe to assume that they will rely on faulty individual…
In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…
To achieve scalable universal quantum computing, we need to implement a universal set of logical gates fault-tolerantly, for which the main difficulty lies with non-Clifford gates. We demonstrate that several characteristic features of the…
Logic Encryption is one of the most popular hardware security techniques which can prevent IP piracy and illegal IC overproduction. It introduces obfuscation by inserting some extra hardware into a design to hide its functionality from…
The implementation of fault-tolerant quantum gates on encoded logic qubits is considered. It is shown that transversal implementation of logic gates based on simple geometric control ideas is problematic for realistic physical systems…
We study the implementation of fault-tolerant logical Clifford gates on stabilizer quantum error correcting codes based on their symmetries. Our approach is to map the stabilizer code to a binary linear code, compute its automorphism group,…
Logic locking is a hardware security technique to intellectual property (IP) against security threats in the IC supply chain, especially untrusted fabs. Such techniques incorporate additional locking circuitry within an IC that induces…
An information processing circuit must be flexible to perform multiple tasks: biochemical information processing circuits in living systems can have multiple functions, requiring them to perform distinct computational tasks in different…
As the size of transistors approaches the mesoscopic scale, existing energy consumption analysis methods exhibit various limits, especially when being applied to describe the non-equilibrium information processing of transistors at…
Fault-tolerant quantum computation using quantum error-correcting codes requires fault-tolerant constructions of nontransversal gates. Shor proposed a fault-tolerant construction of a nontransversal gate, i.e., the Toffoli gate for a family…
Reversible logic has attracted substantial interest due to its low power consumption which is the main concern of low power VLSI circuit design. In this paper, a novel 4x4 reversible gate called inventive gate has been introduced and using…