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Large-scale graph processing has drawn great attention in recent years. Most of the modern-day datacenter workloads can be represented in the form of Graph Processing such as MapReduce etc. Consequently, a lot of designs for Domain-Specific…

Hardware Architecture · Computer Science 2022-09-07 Khushal Sethi

This project introduces a groundbreaking approach to address the challenge of periodic signal compression. By proposing a novel adaptive coding method, coupled with hardware-assisted data compression, we have developed a new architecture…

Information Theory · Computer Science 2023-08-24 Tshimankinda Jerome Ngoy , Mike Nkongolo

Event-based sensors are drawing increasing attention due to their high temporal resolution, low power consumption, and low bandwidth. To efficiently extract semantically meaningful information from sparse data streams produced by such…

Hardware Architecture · Computer Science 2022-05-02 Alfio Di Mauro , Arpan Suravi Prasad , Zhikai Huang , Matteo Spallanzani , Francesco Conti , Luca Benini

This paper presents a novel cloud-edge framework for addressing computational and energy constraints in complex control systems. Our approach centers around a learning-based controller using Spiking Neural Networks (SNN) on physical plants.…

Systems and Control · Electrical Eng. & Systems 2024-05-07 Reza Ahmadvand , Sarah Safura Sharif , Yaser Mike Banad

In this paper we propose a hybrid softwarized architecture of Network Function Virtualization (NFV) where Software-Defined Networking (SDN) and Software-Defined Radio (SDR) components are integrated to form a cloud-based communication…

Networking and Internet Architecture · Computer Science 2023-02-06 Beiran Chen , Frank Slyne , Marco Ruffini

This paper presents a low-power cache architecture based on the series interconnection of conventional 6-transistor static random-access memory (6T SRAM) cells. The proposed approach aims to reduce leakage power in SRAM-based cache memories…

Hardware Architecture · Computer Science 2026-04-23 Naser Khatti Dizabadi , Ceyda Elcin Kaya

The evolution of IoT based smart applications demand porting of artificial intelligence algorithms to the edge computing devices. CNNs form a large part of these AI algorithms. Systolic array based CNN acceleration is being widely advocated…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-11 Hazoor Ahmad , Muhammad Tanvir , Muhammad Abdullah Hanif , Muhammad Usama Javed , Rehan Hafiz , Muhammad Shafique

Power dissipation in the sequential systems of modern CPU integrated chips (CPU-IC viz., Silicon Chip) is in discussion since the last decade. Researchers have been cultivating many low power design methods to choose the best potential…

Hardware Architecture · Computer Science 2018-06-07 Dhiraj Sarkar , Pritam Bhattacharjee , Alak Majumder

Leveraging high degrees of unstructured sparsity is a promising approach to enhance the efficiency of deep neural network DNN accelerators - particularly important for emerging Edge-AI applications. We introduce VUSA, a systolic-array…

Hardware Architecture · Computer Science 2025-06-03 Shereef Helal , Alberto Garcia-Ortiz , Lennart Bamberg

Due to the high activation sparsity and use of accumulates (AC) instead of expensive multiply-and-accumulates (MAC), neuromorphic spiking neural networks (SNNs) have emerged as a promising low-power alternative to traditional DNNs for…

Computer Vision and Pattern Recognition · Computer Science 2022-12-22 Gourav Datta , Zeyu Liu , Md Abdullah-Al Kaiser , Souvik Kundu , Joe Mathai , Zihan Yin , Ajey P. Jacob , Akhilesh R. Jaiswal , Peter A. Beerel

Deep convolutional neural networks (CNN) have shown their good performances in many computer vision tasks. However, the high computational complexity of CNN involves a huge amount of data movements between the computational processor core…

Hardware Architecture · Computer Science 2017-03-07 Shihao Wang , Dajiang Zhou , Xushen Han , Takeshi Yoshimura

Transformers have revolutionized deep learning with applications in natural language processing, computer vision, and beyond. However, their computational demands make it challenging to deploy them on low-power edge devices. This paper…

Hardware Architecture · Computer Science 2025-07-18 Rohit Prasad

This paper presents an extension to an existing instruction set architecture, which gains considerable reduction in power consumption. The reduction in power consumption is achieved through coding of the most commonly executed instructions…

Hardware Architecture · Computer Science 2021-03-17 Bobby Sleeba , Mikael Collin , Mats Brorsson

We consider the problem of data collection in a two-layer network consisting of (1) links between $N$ distributed agents and a remote sink node; (2) a sparse network formed by these distributed agents. We study the effect of inter-agent…

Information Theory · Computer Science 2016-01-25 Yaoqing Yang , Soummya Kar , Pulkit Grover

Much research has been devoted to optimizing algorithms of the Lempel-Ziv (LZ) 77 family, both in terms of speed and memory requirements. Binary search trees and suffix trees (ST) are data structures that have been often used for this…

Data Structures and Algorithms · Computer Science 2016-11-17 Artur Ferreira , Arlindo Oliveira , Mario Figueiredo

The commensal symbiotic radio (CSR) system is proposed as a novel solution for connecting systems through green communication networks. This system enables us to establish secure, ubiquitous, and unlimited connectivity, which is a goal of…

Signal Processing · Electrical Eng. & Systems 2024-02-02 Rahman Saadat Yeganeh , Mohammad Javad Omidi , Mohammad Ghavami

Spiking Neural Networks (SNNs) offer high energy efficiency and event-driven computation, ideal for low-power edge AI. Their hardware implementation on FPGAs, however, faces challenges due to heavy computation, large memory use, and limited…

Hardware Architecture · Computer Science 2026-03-20 Mohammad Javad Sekonji , Ali Mahani , Maryam Mirsadeghi , Mahdi Taheri

This paper summarizes the idea of Low-Cost Interlinked Subarrays (LISA), which was published in HPCA 2016, and examines the work's significance and future potential. Contemporary systems perform bulk data movement movement inefficiently, by…

Hardware Architecture · Computer Science 2018-05-09 Kevin K. Chang , Prashant J. Nair , Saugata Ghose , Donghyuk Lee , Moinuddin K. Qureshi , Onur Mutlu

Network coding enhances performance in network communications and distributed storage by increasing throughput and robustness while reducing latency. Batched Sparse (BATS) codes are a class of capacity-achieving network codes, but their…

Hardware Architecture · Computer Science 2025-01-10 Jiaxin Qing , Philip H. W. Leong , Kin Hong Lee , Raymond W. Yeung

A novel energy reduction strategy to maximally exploit the dynamic workload variation is proposed for the offline voltage scheduling of preemptive systems. The idea is to construct a fully-preemptive schedule that leads to minimum energy…

Other Computer Science · Computer Science 2011-11-09 Lap-Fai Leung , Chi-Ying Tsui , Xiaobo Sharon Hu