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Modern large language model workloads put increasing demands on parallel compute capability and on-chip memory capacity, while also stressing fine-grained data movement and synchronization. These trends motivate exploring and designing…

Hardware Architecture · Computer Science 2026-05-11 Yinrong Li , Zexin Fu , Yichao Zhang , Germain Haugou , Chi Zhang , Marco Bertuletti , Bowen Wang , Luca Benini

Rapid design space exploration in early design stage is critical to algorithm-architecture co-design for accelerators. In this work, a pre-RTL cycle-accurate accelerator simulator based on SystemC transaction-level modeling (TLM),…

Hardware Architecture · Computer Science 2020-07-30 Sunwoo Kim , Jooho Wang , Youngho Seo , Sanghun Lee , Yeji Park , Sungkyung Park , Chester Sungchung Park

The deployment and scaling of large language models (LLMs) have become critical as they permeate various applications, demanding high-throughput and low-latency serving systems. Existing frameworks struggle to balance these requirements,…

Spatial computing architectures promise a major stride in performance and energy efficiency over the traditional load/store devices currently employed in large scale computing systems. The adoption of high-level synthesis (HLS) from…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-24 Johannes de Fine Licht , Maciej Besta , Simon Meierhans , Torsten Hoefler

High-level synthesis (HLS) aims at democratizing custom hardware acceleration with highly abstracted software-like descriptions. However, efficient accelerators still require substantial low-level hardware optimizations, defeating the HLS…

Hardware Architecture · Computer Science 2024-11-21 Giovanni Brignone , Roberto Bosio , Fabrizio Ottati , Claudio Sansoè , Luciano Lavagno

High-Level Synthesis (HLS) tools offer rapid hardware design from C code, but their compatibility is limited by code constructs. This paper investigates Large Language Models (LLMs) for automatically refactoring C code into HLS-compatible…

Hardware Architecture · Computer Science 2025-05-20 Luca Collini , Siddharth Garg , Ramesh Karri

Workload traces are essential to understand complex computer systems' behavior and manage processing and memory resources. Since real-world traces are hard to obtain, synthetic trace generation is a promising alternative. This paper…

Software Engineering · Computer Science 2025-09-23 Donghyun Kim , Sriram Ravula , Taemin Ha , Alexandros G. Dimakis , Daehyeok Kim , Aditya Akella

Long-context inference in LLMs faces the dual challenges of quadratic attention complexity and prohibitive KV cache memory. While token-level sparse attention offers superior accuracy, its indexing overhead is costly; block-level methods…

Computation and Language · Computer Science 2026-04-10 Yuxuan Hu , Jianchao Tan , Jiaqi Zhang , Wen Zan , Pingwei Sun , Yifan Lu , Yerui Sun , Yuchen Xie , Xunliang Cai , Jing Zhang

Verifiers play a crucial role in large language model (LLM) reasoning, needed by post-training techniques such as reinforcement learning. However, reliable verifiers are hard to get for difficult coding problems, because a well-disguised…

Computation and Language · Computer Science 2025-06-02 Zhongmou He , Yee Man Choi , Kexun Zhang , Jiabao Ji , Junting Zhou , Dejia Xu , Ivan Bercovich , Aidan Zhang , Lei Li

System Level Synthesis (SLS) allows us to construct internally stabilizing controllers for large-scale systems. However, solving large-scale SLS problems is computationally expensive and the state-of-the-art methods consider only state…

Optimization and Control · Mathematics 2022-06-07 Lauren Conger , Shih-Hao Tseng

Low-latency decoding for large language models (LLMs) is crucial for applications like chatbots and code assistants, yet generating long outputs remains slow in single-query settings. Prior work on speculative decoding (which combines a…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-16 Ziyi Zhang , Ziheng Jiang , Chengquan Jiang , Menghan Yu , Size Zheng , Haibin Lin , Henry Hoffmann , Xin Liu

The design of post-quantum cryptography (PQC) hardware is a complex and hierarchical process with many challenges. A primary bottleneck is the conversion of PQC reference codes from C to high-level synthesis (HLS) specifications, which…

Cryptography and Security · Computer Science 2026-03-10 Buddhi Perera , Zeng Wang , Weihua Xiao , Mohammed Nabeel , Ozgur Sinanoglu , Johann Knechtel , Ramesh Karri

This paper introduces LLMServingSim2.0, a system simulator designed for exploring heterogeneous hardware in large-scale LLM serving systems. LLMServingSim2.0 addresses two key limitations of its predecessor: (1) integrating hardware models…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-11 Jaehong Cho , Hyunmin Choi , Jongse Park

Reinforcement learning (RL) has become a pivotal technology in the post-training phase of large language models (LLMs). Traditional task-colocated RL frameworks suffer from significant scalability bottlenecks, while task-separated RL…

Large Language Models (LLMs) have become extremely potent instruments with exceptional capacities for comprehending and producing human-like text in a wide range of applications. However, the increasing size and complexity of LLMs present…

Machine Learning · Computer Science 2024-06-18 Yingbing Huang , Lily Jiaxin Wan , Hanchen Ye , Manvi Jha , Jinghua Wang , Yuhong Li , Xiaofan Zhang , Deming Chen

Design of next generation computer systems should be supported by simulation infrastructure that must achieve a few contradictory goals such as fast execution time, high accuracy, and enough flexibility to allow comparison between large…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-04-02 Ori Chalak , Cai Weiguang , Li Wei , Fang Lei , Zheng Libing , Wang Jintang , Wu Zuguang , Gu Xiongli , Wang Haibin , Avi Mendelson

As large language models (LLMs) have shown great success in many tasks, they are used in various applications. While a lot of works have focused on the efficiency of single-LLM application (e.g., offloading, request scheduling, parallelism…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-24 Jingzhi Fang , Yanyan Shen , Yue Wang , Lei Chen

In last two years, large language models (LLMs) have shown strong capabilities in code generation, including hardware design at register-transfer level (RTL). While their use in high-level synthesis (HLS) remains comparatively less mature,…

Hardware Architecture · Computer Science 2026-01-29 M Zafir Sadik Khan , Kimia Azar , Hadi Kamali

The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu