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We propose an analytical device model for a graphene nanoribbon field-effect transistor (GNR-FET). The GNR-FET under consideration is based on a heterostructure which consists of an array of nanoribbons clad between the highly conducting…
Capacitance-Voltage (C-V) & Ballistic Current- Voltage (I-V) characteristics of Double Gate (DG) Silicon-on- Insulator (SOI) Flexible FETs having sub 35nm dimensions are obtained by self-consistent method using coupled Schrodinger- Poisson…
A simple scalable scheme is reported for fabricating suspended carbon nanotube field effect transistors (CNT-FETs) without exposing pristine as-grown carbon nanotubes to subsequent chemical processing. Versatility and ease of the technique…
InGaAs gate-all-around nanowire MOSFETs with channel length down to 50nm have been experimentally demonstrated by top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that…
We report the operation of a field-effect transistor based on a single InAs nanowire gated by an ionic liquid. Liquid gating yields very efficient carrier modulation with a transconductance value thirty time larger than standard back gating…
We analyze the distributions of electric potential and field, polarization and charge, and the differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin…
Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor…
The electrostatic coupling between singled-walled carbon nanotube (SWNT) networks/arrays and planar gate electrodes in thin-film transistors (TFTs) is analyzed both in the quantum limit with an analytical model and in the classical limit…
Electrically controlled rotation of spins in a semiconducting channel is a prerequisite for the successful realization of many spintronic devices, like, e.g., the spin field effect transistor (sFET). To date, there have been only a few…
Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit…
In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…
Ionic gating is a very popular tool to investigate and control the electric charge transport and electronic ground state in a wide variety of different materials. This is due to its capability to induce large modulations of the surface…
Amorphous oxide semiconductors (AOSs) have recently gained attention as a promising channel material of back-end-of-line (BEOL)-compatible transistors for monolithic three-dimensional (3D) integrations. However, the degradation in device…
In conventional metal-oxide semiconductor (CMOS) electronics, the logic state of a device is set by a gate voltage (VG). The superconducting equivalent of such effect had remained unknown until it was recently shown that a VG can tune the…
In this paper, two dimensional modulation of the potential in sexithiophene (T6) / N,N-bis(n-octyl)-dicyanoperylenediimide (PDI-8CN2) heterojunction field effect transistors due to the specific microstructure at the interface is used to…
The modulation of channel conductance in field-effect transistors (FETs) via metal-oxide-semiconductor (MOS) structures has revolutionized information processing and storage. However, the limitations of silicon-based FETs in electrical…
Single electron transistors (SETs) made from single wall carbon nanotubes (SWCNTs) are promising for quantum electronic devices operating with ultra-low power consumption and allow fundamental studies of electron transport. We report on…
The cold source field-effect transistor (CSFET) is promising for reducing power dissipation in integrated circuits by engineering the density of states at the injecting source. Existing CSFET designs utilizing Dirac-source metals or…
We report a method to pattern monolayer graphene nanoconstriction field effect transistors (NCFETs) with critical dimensions below 10 nm. NCFET fabrication is enabled by the use of feedback controlled electromigration (FCE) to form a…
Fundamental physical properties limiting the performance of spin field effect transistors are compared to those of ordinary (charge-based) field effect transistors. Instead of raising and lowering a barrier to current flow these spin…