Related papers: Progress toward superconductor electronics fabrica…
Increasing integration scale of superconductor electronics (SCE) requires employing kinetic inductors and self-shunted Josephson junctions (JJs) for miniaturizing inductors and JJs. We have been developing a ten-superconductor-layer…
We are developing a superconductor electronics fabrication process with up to nine planarized superconducting layers, stackable stud vias, self-shunted Nb/AlOx-Al/Nb Josephson junctions, and one layer of MoNx kinetic inductors. The minimum…
To increase integration scale of superconductor electronics, we are developing a new, SFQ7ee, node of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized…
A new fabrication process for superconducting integrated digital circuits is reported. We have developed the "SIMIT Nb04" fabrication technique for superconducting integrated circuits with Nb-based Josephson junctions based on the validated…
We have developed a fabrication technology for the development of large-scale superconducting integrated circuits with Nb-based Josephson junctions. The standard fabrication process with 10 mask levels uses four metal layers including 3 Nb…
Recent progress in superconductor electronics fabrication has enabled single-flux-quantum (SFQ) digital circuits with close to one million Josephson junctions (JJs) on 1-cm$^2$ chips. Increasing the integration scale further is challenging…
A fabrication process for Nb/Al-AlOx/Nb Josephson junctions (JJs) with sizes down to 200 nm has been developed on a 200-mm-wafer tool set typical for CMOS foundry. This process is the core of several nodes of a roadmap for fully-planarized…
We present our new fabrication Process for Superconductor Electronics (PSE2) that integrates two (2) layers of Josephson junctions in a fully planarized multilayer process on 200-mm wafers. The two junction layers can be, e.g., conventional…
We present measurements of the self- and mutual inductance of NbN and bilayer NbN/Nb inductors with Nb ground plane(s) fabricated in an advanced process for superconductor electronics developed at MIT Lincoln Laboratory. In this process,…
We review the salient features of two advanced nodes of an 8-Nb-layer fully planarized process developed recently at MIT Lincoln Laboratory for fabricating Single Flux Quantum(SFQ) digital circuits with very large scale integration on…
A fabrication process has been developed for fully planarized Nb-based superconducting inter-layer connections (vias) with minimum size down to 250 nm for superconductor very large scale integrated (VLSI) circuits with 8 and 10…
We have developed a novel fabrication process for ultra-small, full-epitaxial NbN Josephson junctions on a silicon (Si) substrate. A full-epitaxial NbN/AlN/NbN tri-layer was grown on a Si (100) wafer with a (200)-oriented TiN buffer layer.…
We report a milestone in achieving large-scale, ultrathin (~5 nm) superconducting NbN thin films on 300 mm Si wafers using a high-volume manufacturing (HVM) industrial physical vapor deposition (PVD) system. The NbN thin films possess…
Inductance of superconducting thin-film inductors and structures with linewidth down to 250 nm has been experimentally evaluated. The inductors include various striplines and microstrips, their 90-degree bends and meanders, interlayer vias,…
We report the realization of multilayer three-dimensional nanobridge Josephson junctions based on Nb/NbN and Nb/TiN superconducting stacks fabricated using electron-beam lithography and chlorine-based dry etching. In this architecture, a…
We explore novel junction configurations as an extension of our established Focused Ion Beam-based low TC SNS Junction fabrication technique. By milling a circular trench (diameter 1 micron, width 50 nm) in a 125 nm Nb 75 nm Cu bilayer we…
The most developed integrated receivers for THz radiation nowadays are based on Josephson junction SIS devices. In this kind of devices, the highest receivable frequency is determined by the energy gap of the superconducting electrodes and…
Superconductor digital electronics using Josephson junctions as ultrafast switches and magnetic-flux encoding of information was proposed over 30 years ago as a sub-terahertz clock frequency alternative to semiconductor electronics based on…
Josephson junction transistors and 50-junction arrays with linear junction dimensions from 200 nm down to 70 nm were fabricated from standard Nb/AlOx/Nb trilayers. The fabrication process includes electron beam lithography, dry etching,…
Vertical integration of superconducting electronics requires fabrication strategies that preserve pristine interfaces while accommodating oxidation-sensitive elemental superconductors. However, existing van der Waals-based vertical…