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FPGAs have shown great potential in providing low-latency and energy-efficient solutions for deep neural network (DNN) inference applications. Currently, the majority of FPGA-based DNN accelerators in the cloud run in a time-division…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-30 Shulin Zeng , Guohao Dai , Hanbo Sun , Kai Zhong , Guangjun Ge , Kaiyuan Guo , Yu Wang , Huazhong Yang

Computing needs for high energy physics are already intensive and are expected to increase drastically in the coming years. In this context, heterogeneous computing, specifically as-a-service computing, has the potential for significant…

Development of modern integrated circuit technologies makes it feasible to develop cheaper, faster and smaller special purpose signal processing function circuits. Digital Signal processing functions are generally implemented either on…

Hardware Architecture · Computer Science 2013-06-04 Amitabha Sinha , Mitrava Sarkar , Soumojit Acharyya , Suranjan Chakraborty

This paper introduces an effort to incorporate reconfigurable logic (FPGA) components into a software programming model. For this purpose, we have implemented a hardware engine for remote memory communication between hardware computation…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-08-22 Ruediger Willenberg , Paul Chow

The increasing demand for real-time, low-latency artificial intelligence applications has propelled the use of Field-Programmable Gate Arrays (FPGAs) for Convolutional Neural Network (CNN) implementations. FPGAs offer reconfigurability,…

Hardware Architecture · Computer Science 2025-10-06 Philippe Magalhães , Virginie Fresse , Benoît Suffran , Olivier Alata

Field programmable gate arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Increases in FPGA configurable logic capacity and decreasing FPGA costs have enabled designers to more readily incorporate FPGAs…

Hardware Architecture · Computer Science 2011-11-09 Roman Lysecky , Frank Vahid

Datacenter servers are increasingly heterogeneous: from x86 host CPUs, to ARM or RISC-V CPUs in NICs/SSDs, to FPGAs. Previous works have demonstrated that migrating application execution at run-time across heterogeneous-ISA CPUs can yield…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-29 Edson Horta , Ho-Ren Chuang , Naarayanan Rao VSathish , Cesar Philippidis , Antonio Barbalace , Pierre Olivier , Binoy Ravindran

In recent years, Convolutional Neural Networks (ConvNets) have become an enabling technology for a wide range of novel embedded Artificial Intelligence systems. Across the range of applications, the performance needs vary significantly,…

Computer Vision and Pattern Recognition · Computer Science 2017-11-27 Stylianos I. Venieris , Christos-Savvas Bouganis

Embedded system performances are bounded by power consumption. The trend is to offload greedy computations on hardware accelerators as GPU, Xeon Phi or FPGA. FPGA chips combine both flexibility of programmable chips and energy-efficiency of…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-01-16 Christophe Alias

As the interest in FPGA-based accelerators for HPC applications increases, new challenges also arise, especially concerning different programming and portability issues. This paper aims to provide a snapshot of the current state of the FPGA…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-06 Manuel de Castro , Francisco J. andújar , Roberto R. Osorio , Rocío Carratalá-Sáez , Diego R. Llanos

We proposes a platform which can generate hardware/software description based on flexible in-struction set architectures (ISAs). The platform takes advantage of the flexibility of field pro-grammable gate array (FPGA) to design many micro…

Logic in Computer Science · Computer Science 2021-05-27 Shih-Yi Yuan , Bo-Yu Zhu

While FPGA accelerator boards and their respective high-level design tools are maturing, there is still a lack of multi-FPGA applications, libraries, and not least, benchmarks and reference implementations towards sustained HPC usage of…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-03-01 Marius Meyer , Tobias Kenter , Christian Plessl

Convolutional Neural Networks (CNNs) are widely used in deep learning applications, e.g. visual systems, robotics etc. However, existing software solutions are not efficient. Therefore, many hardware accelerators have been proposed…

Machine Learning · Computer Science 2021-09-08 Sasindu Wijeratne , Sandaruwan Jayaweera , Mahesh Dananjaya , Ajith Pasqual

Modern big data workflows are characterized by computationally intensive kernels. The simulated results are often combined with knowledge extracted from AI models to ultimately support decision-making. These energy-hungry workflows are…

Recent researches on neural network have shown significant advantage in machine learning over traditional algorithms based on handcrafted features and models. Neural network is now widely adopted in regions like image, speech and video…

Hardware Architecture · Computer Science 2018-12-07 Kaiyuan Guo , Shulin Zeng , Jincheng Yu , Yu Wang , Huazhong Yang

FPGAs are increasingly common in modern applications, and cloud providers now support on-demand FPGA acceleration in data centers. Applications in data centers run on virtual infrastructure, where consolidation, multi-tenancy, and workload…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-07 Joshua Landgraf , Tiffany Yang , Will Lin , Christopher J. Rossbach , Eric Schkufza

Recently, FPGA accelerators have risen in popularity as they present a suitable way of satisfying the high-computation and low-power demands of real time applications. The modern electric transportation systems (such as aircraft, road…

Operating Systems · Computer Science 2023-04-05 Anna Panagopoulou , Michele Paolino , Daniel Raho

The emergence of P4, a domain specific language, coupled to PISA, a domain specific architecture, is revolutionizing the networking field. P4 allows to describe how packets are processed by a programmable data plane, spanning ASICs and…

Hardware Architecture · Computer Science 2020-04-17 Thomas Luinaud , Thibaut Stimpfling , Jeferson Santiago da Silva , Yvon Savaria , J. M. Pierre Langlois

Reducing energy consumption is a challenge that is faced on a daily basis by teams from the High-Performance Computing as well as the Embedded domain. This issue is mostly attacked from an hardware perspective, by devising architectures…

Performance · Computer Science 2015-11-30 Baptiste Delporte , Roberto Rigamonti , Alberto Dassatti

Field-Programmable Gate Arrays (FPGAs) are more energy efficient and cost effective than CPUs for a wide variety of datacenter applications. Yet, for latency-sensitive and bursty workloads, this advantage can be difficult to harness due to…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-11 Pratyush Patel , Katie Lim , Kushal Jhunjhunwalla , Ashlie Martinez , Max Demoulin , Jacob Nelson , Irene Zhang , Thomas Anderson
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