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The increasing complexity of modern very-large-scale integration (VLSI) design highlights the significance of Electronic Design Automation (EDA) technologies. Chip placement is a critical step in the EDA workflow, which positions chip…

A faster implementation of the Quadratic Programming (QP) solver used in the Model Predictive Control scheme for Iter Plasma current and shape control was developed for Xilinx Field-Programmable Gate Array (FPGA) platforms using a…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-06-19 Samo Gerkšič , Boštjan Pregelj , Matija Perne

This paper presents a deeply pipelined and massively parallel Binary Search Tree (BST) accelerator for Field Programmable Gate Arrays (FPGAs). Our design relies on the extremely parallel on-chip memory, or Block RAMs (BRAMs) architecture of…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-04 Oyku Melikoglu , Oguz Ergin , Behzad Salami , Julian Pavon , Osman Unsal , Adrian Cristal

Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization…

Multimodal deep learning harnesses diverse imaging modalities, such as MRI sequences, to enhance diagnostic accuracy in medical imaging. A key challenge is determining the optimal timing for integrating these modalities-specifically,…

Computer Vision and Pattern Recognition · Computer Science 2026-02-16 Valerio Guarrasi , Klara Mogensen , Sara Tassinari , Sara Qvarlander , Paolo Soda

Approximate matrix inversion based methods is widely used for linear massive multiple-input multiple-output (MIMO) received symbol vector detection. Such detectors typically utilize the diagonally dominant channel matrix of a massive MIMO…

Information Theory · Computer Science 2020-11-02 Shahriar Shahabuddin , Mahmoud A. Albreem , Mohammad Shahanewaz Shahabuddin , Zaheer Khan , Markku Juntti

FPGAs have found their way into data centers as accelerator cards, making reconfigurable computing more accessible for high-performance applications. At the same time, new high-level synthesis compilers like Xilinx Vitis and runtime…

Hardware Architecture · Computer Science 2021-12-16 Puya Amiri , Arsène Pérard-Gayot , Richard Membarth , Philipp Slusallek , Roland Leißa , Sebastian Hack

Confronted with the challenge of high performance for applications and the restriction of hardware resources for field-programmable gate arrays (FPGAs), partial dynamic reconfiguration (PDR) technology is anticipated to accelerate the…

Hardware Architecture · Computer Science 2018-12-27 Song Chen , Jinglei Huang , Xiaodong Xu , Qi Xu

Despite the impressive search rate of one key per clock cycle, the update stage of a random-access-memory-based content-addressable-memory (RAM-based CAM) always suffers high latency. Two primary causes of such latency include: (1) the…

Hardware Architecture · Computer Science 2018-06-28 Xuan-Thuan Nguyen , Trong-Thuc Hoang , Hong-Thu Nguyen , Katsumi Inoue , Cong-Kha Pham

Multiphase compressible flows are often characterized by a broad range of space and time scales. Thus entailing large grids and small time steps, simulations of these flows on CPU-based clusters can thus take several wall-clock days.…

Modern embedded and cyber-physical systems require every day more performance, power efficiency and flexibility, to execute several profiles and functionalities targeting the ever growing adaptivity needs and preserving execution…

Hardware Architecture · Computer Science 2021-03-08 Carlo Sau , Tiziana Fanni , Claudio Rubattu , Luigi Raffo , Francesca Palumbo

The Front-Tracking Method (FTM) is a promising approach for numerical solution of multiphase flows, considering a trade-off between accuracy and computational cost. The existing open-source open-access software for FTM is scarce, due to…

Fluid Dynamics · Physics 2026-02-25 Ehsan Amani

Balancing the workload of sophisticated simulations is inherently difficult, since we have to balance both computational workload and memory footprint over meshes that can change any time or yield unpredictable cost per mesh entity, while…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-08-04 Philipp Samfass , Tobias Weinzierl , Dominic E. Charrier , Michael Bader

The paper presents a systematic study and implementation of a reconfigurable combinatorial multi-operand adder for use in Deep Learning systems. The size of carry changes with the number of operands and hence a reliable algorithm to…

Hardware Architecture · Computer Science 2020-08-10 Shilpa Mayannavar , Uday Wali

It is highly predicted that the roads and parking areas will be extremely congested with vehicles to the point that searching for a novel solution will not be an optional choice for conserving the sustainability rate of the overall…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-07 Hossam O. Ahmed

Long-term time series forecasting (LTSF) is a critical task in computational intelligence. While Transformer-based models effectively capture long-range dependencies, they often suffer from quadratic complexity and overfitting due to data…

Machine Learning · Computer Science 2025-12-03 Li Qianyang , Zhang Xingjun , Wang Shaoxun , Wei Jia

Increasingly FPGAs will be deployed at scale due to the need for increased need for power efficient computation and improved high level synthesis tool flows, creating a new category of device: data centre FPGAs. A method for using these…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-07-19 Gordon Inggs

The scan-based testing has been widely used as a Design-for-Test (DfT) mechanism for most recent designs. It has gained importance not only in manufacturing testing but also in online testing and debugging. However, the multiplexer-based…

Hardware Architecture · Computer Science 2022-12-26 Lakshmi Bhanuprakash Reddy Konduru , Vijaya Lakshmi , Jaynarayan T Tudu

Different retail and e-commerce companies are facing the challenge of assembling large numbers of time-critical picking orders that include both small-line and multi-line orders. To reduce unproductive picker working time as in traditional…

Optimization and Control · Mathematics 2022-04-14 Lin Xie , Hanyi Li , Laurin Luttmann

FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading FPGA vendors have enhanced their architectures to more…

Hardware Architecture · Computer Science 2024-04-18 Endri Taka , Dimitrios Gourounas , Andreas Gerstlauer , Diana Marculescu , Aman Arora