Related papers: Low-Latency Analog-to-Analog Signal Processing usi…

Time-sensitive wireless networks are an important enabling building block for many emerging industrial Internet of Things (IoT) applications. Quick prototyping and evaluation of time-sensitive wireless technologies are desirable for R&D…

The present work focus on the implementation and analyze of performance of a low-resolution OFDM system prototype with low-cost hardware. A software defined radio (SDR) system was chosen in this implementation due to its various advantages…

A low cost PC based real time data logging system can be used in the laboratories for the measurement, monitoring and storage of the data for slowly varying signals in science and engineering stream. This can be designed and interfaced to…

The pseudo-analog wireless video transmission technology can improve the effectiveness, reliability, and robustness of the conventional digital system in video broadcast scenarios. Although some prototypes of IEEE 802.11 series have been…

We present and characterize a modular, open-source system to perform feedback control experiments on configurations of atoms and molecules in arrays of optical tweezers. The system features a modular, cost-effective computer architecture…

Software defined radio (SDR) allows unprecedented levels of flexibility by transitioning the radio communication system from a rigid hardware platform to a more user-controlled software paradigm. However, it can still be time consuming to…

Sensory processing with neuromorphic systems is typically done by using either event-based sensors or translating input signals to spikes before presenting them to the neuromorphic processor. Here, we offer an alternative approach: direct…

Software Defined Radio (SDR) platforms are useful tools to design new wireless technologies or to improve specifications of existing ones. The IEEE 802.11p is the de-facto standard for Wireless Vehicular Ad-hoc NETworks (VANETs). It has…

Synaptic delay has attracted significant attention in neural network dynamics for integrating and processing complex spatiotemporal information. This paper introduces a high-throughput Spiking Neural Network (SNN) processor that supports…

To rapidly process temporal information at a low metabolic cost, biological neurons integrate inputs as an analog sum but communicate with spikes, binary events in time. Analog neuromorphic hardware uses the same principles to emulate…

Thanks to their parallel and sparse activity features, recurrent neural networks (RNNs) are well-suited for hardware implementation in low-power neuromorphic hardware. However, mapping rate-based RNNs to hardware-compatible spiking neural…

Demand for on-chip low-dropout regulators (LDOs) with both high power-supply rejection ratio (PSRR) and fast transient response is growing as system-on-chip (SoC) integration increases. However, conventional LDO architectures face…

The rapid advancement of Radio Frequency System-onChip (RFSoC) technology from Xilinx (AMD) has enabled the integration of high-speed data converters and programmable logic within a single package. RFSoC platforms are already widely adopted…

Research conducted in LTE and 5G wireless communications systems uses common off-the-shelf hardware components and commercial software defined radio (SDR) hardware. One of the more popular SDR platforms is the Ettus USRP product line which…

This paper introduces the first low-power hardware accelerator for Spiking Transformers, an emerging alternative to traditional artificial neural networks. By modifying the base Spikformer model to use IAND instead of residual addition, the…

Approximate computing is emerging as an alternative to accurate computing due to its potential for realizing digital circuits and systems with low power dissipation, less critical path delay, and less area occupancy for an acceptable…

Many application domains face the challenges of high-power consumption and high computational demands, especially with the advancement in embedded machine learning and edge computing. Designing application-specific circuits is crucial to…

This paper presents a high speed and area efficient DWT processor based design for Image Compression applications. In this proposed design, pipelined partially serial architecture has been used to enhance the speed along with optimal…

High throughput and low latency data processing is essential for systems requiring live decision making, control, and machine learning-optimized data reduction. We focus on two distinct use cases for in-flight streaming data processing for…

In MIMO systems, the presence of phase noise is a significant factor that can degrade performance. For MIMO testbeds build from SDR devices, phase noise cannot be ignored, particular in applications that require phase synchronization. This…