English
Related papers

Related papers: MAC-DO: An Efficient Output-Stationary GEMM Accele…

200 papers

We propose a co-design approach for compute-in-memory inference for deep neural networks (DNN). We use multiplication-free function approximators based on ell_1 norm along with a co-adapted processing array and compute flow. Using the…

Hardware Architecture · Computer Science 2021-02-02 Shamma Nasrin , Diaa Badawi , Ahmet Enis Cetin , Wilfred Gomes , Amit Ranjan Trivedi

Convolutional neural networks (CNNs) are one of the most successful machine learning techniques for image, voice and video processing. CNNs require large amounts of processing capacity and memory bandwidth. Hardware accelerators have been…

Hardware Architecture · Computer Science 2018-05-03 James Garland , David Gregg

The increasing popularity of deep neural network (DNN) applications demands high computing power and efficient hardware accelerator architecture. DNN accelerators use a large number of processing elements (PEs) and on-chip memory for…

Machine Learning · Computer Science 2022-04-28 Binayak Tiwari , Mei Yang , Xiaohang Wang , Yingtao Jiang

As a result of the increasing demand for deep neural network (DNN)-based services, efforts to develop dedicated hardware accelerators for DNNs are growing rapidly. However,while accelerators with high performance and efficiency on…

Neural and Evolutionary Computing · Computer Science 2018-03-26 Sung Kim , Patrick Howe , Thierry Moreau , Armin Alaghi , Luis Ceze , Visvesh Sathe

Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM…

Hardware Architecture · Computer Science 2024-07-19 Zhiyu Chen , Ziyuan Wen , Weier Wan , Akhil Reddy Pakala , Yiwei Zou , Wei-Chen Wei , Zengyi Li , Yubei Chen , Kaiyuan Yang

Stochastic computing (SC) offers hardware simplicity but suffers from low throughput, while high-throughput Digital Computing-in-Memory (DCIM) is bottlenecked by costly adder logic for matrix-vector multiplication (MVM). To address this…

Hardware Architecture · Computer Science 2026-01-13 Kunming Shao , Liang Zhao , Jiangnan Yu , Zhipeng Liao , Xiaomeng Wang , Yi Zou , Tim Kwang-Ting Cheng , Chi-Ying Tsui

Recent years have seen a rapid increase in research activity in the field of DRAM-based Processing-In-Memory (PIM) accelerators, where the analog computing capability of DRAM is employed by minimally changing the inherent structure of DRAM…

Hardware Architecture · Computer Science 2023-02-16 Supreeth Mysore Shivanandamurthy , Sairam Sri Vatsavai , Ishan Thakkar , Sayed Ahmad Salehi

Vector-Matrix Multiplication (VMM) is the fundamental and frequently required computation in inference of Neural Networks (NN). Due to the large data movement required during inference, VMM can benefit greatly from in-memory computing.…

Hardware Architecture · Computer Science 2025-10-03 Felix Zeller , John Reuben , Dietmar Fey

The energy efficiency of analog computing-in-memory (ACIM) accelerator for recurrent neural networks, particularly long short-term memory (LSTM) network, is limited by the high proportion of nonlinear (NL) operations typically executed…

Hardware Architecture · Computer Science 2025-12-09 Junyi Yang , Xinyu Luo , Ye Ke , Zheng Wang , Hongyang Shang , Shuai Dong , Zhengnan Fu , Xiaofeng Yang , Hongjie Liu , Arindam Basu

Deep neural networks (DNNs) face significant challenges when deployed on resource-constrained extreme edge devices due to their computational and data-intensive nature. While standalone accelerators tailored for specific application…

Hardware Architecture · Computer Science 2024-11-22 Xiaoling Yi , Ryan Antonio , Joren Dumoulin , Jiacong Sun , Josse Van Delm , Guilherme Paim , Marian Verhelst

DL inference queries play an important role in diverse internet services and a large fraction of datacenter cycles are spent on processing DL inference queries. Specifically, the matrix-matrix multiplication (GEMM) operations of…

Hardware Architecture · Computer Science 2020-12-02 Benjamin Y. Cho , Jeageun Jung , Mattan Erez

Retrieval-Augmented Generation (RAG) enhances large language models (LLMs) by integrating external knowledge retrieval but faces challenges on edge devices due to high storage, energy, and latency demands. Computing-in-Memory (CIM) offers a…

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and…

Hardware Architecture · Computer Science 2023-12-21 Alireza Amirshahi , Giovanni Ansaloni , David Atienza

In-memory computing hardware accelerators allow more than 10x improvements in peak efficiency and performance for matrix-vector multiplications (MVM) compared to conventional digital designs. For this, they have gained great interest for…

Hardware Architecture · Computer Science 2024-09-19 Pouya Houshmand , Marian Verhelst

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better accuracy and the other with more compact sizing for energy…

Hardware Architecture · Computer Science 2021-07-07 Gokul Krishnan , Sumit K. Mandal , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

Convolutional Neural Networks (CNNs), a prominent type of Deep Neural Networks (DNNs), have emerged as a state-of-the-art solution for solving machine learning tasks. To improve the performance and energy efficiency of CNN inference, the…

Hardware Architecture · Computer Science 2024-08-06 Rachmad Vidya Wicaksana Putra , Muhammad Abdullah Hanif , Muhammad Shafique

In-memory computing (IMC) can eliminate the data movement between processor and memory which is a barrier to the energy-efficiency and performance in Von-Neumann computing. Resistive RAM (RRAM) is one of the promising devices for IMC…

Hardware Architecture · Computer Science 2020-11-03 Sina Sayyah Ensan , Swaroop Ghosh , Seyedhamidreza Motaman , Derek Weast

Deep Neural Networks (DNNs) and Large Language Models (LLMs) have revolutionized artificial intelligence, yet their deployment faces significant memory and computational challenges, especially in resource-constrained environments.…

Hardware Architecture · Computer Science 2025-04-24 Cong Guo , Chiyue Wei , Jiaming Tang , Bowen Duan , Song Han , Hai Li , Yiran Chen

Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). The systolic array (SA) is a pipelined 2D array of processing elements…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-19 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Designing lightweight convolutional neural network (CNN) models is an active research area in edge AI. Compute-in-memory (CIM) provides a new computing paradigm to alleviate time and energy consumption caused by data transfer in von Neumann…

Hardware Architecture · Computer Science 2025-08-19 Wenyong Zhou , Yuan Ren , Jiajun Zhou , Tianshu Hou , Ngai Wong