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The increasing demands for computing performance have been a reality regardless of the requirements for smaller and more energy efficient devices. Throughout the years, the strategy adopted by industry was to increase the robustness of a…

Software Engineering · Computer Science 2019-05-07 Hugo Andrade , Ivica Crnkovic

Transformers have become the backbone of neural network architecture for most machine learning applications. Their widespread use has resulted in multiple efforts on accelerating attention, the basic building block of transformers. This…

Hardware Architecture · Computer Science 2025-02-19 Dong Eun Kim , Tanvi Sharma , Kaushik Roy

Next-generation supercomputers will feature more hierarchical and heterogeneous memory systems with different memory technologies working side-by-side. A critical question is whether at large scale existing HPC applications and emerging…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-04-27 Ivy Bo Peng , Stefano Markidis , Erwin Laure , Gokcen Kestor , Roberto Gioiosa

Processing-in-memory (PIM) architectures allow software to explicitly initiate computation in the memory. This effectively makes PIM operations a new class of memory operations, alongside standard memory operations (e.g., load, store). For…

Hardware Architecture · Computer Science 2022-12-08 Ben Perach , Ronny Ronnen , Shahar Kvatinsky

Efficient memory management in heterogeneous systems is increasingly challenging due to diverse compute architectures (e.g., CPU, GPU, FPGA) and dynamic task mappings not known at compile time. Existing approaches often require programmers…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-29 Serhan Gener , Aditya Ukarande , Shilpa Mysore Srinivasa Murthy , Sahil Hassan , Joshua Mack , Chaitali Chakrabarti , Umit Ogras , Ali Akoglu

Bulk-bitwise processing-in-memory (PIM), an emerging computational paradigm utilizing memory arrays as computational units, has been shown to benefit database applications. This paper demonstrates how GROUP-BY and JOIN, database operations…

Hardware Architecture · Computer Science 2023-11-03 Ben Perach , Ronny Ronen , Shahar Kvatinsky

With the widespread use of deep neural networks(DNNs) in intelligent systems, DNN accelerators with high performance and energy efficiency are greatly demanded. As one of the feasible processing-in-memory(PIM) architectures,…

Hardware Architecture · Computer Science 2023-12-22 Junpeng Wang , Mengke Ge , Bo Ding , Qi Xu , Song Chen , Yi Kang

3D point cloud neural networks have significantly enhanced the perceptual capabilities of resource-limited mobile intelligent systems. However, despite the transformative impact, the point cloud algorithm suffers from substantial memory…

Hardware Architecture · Computer Science 2026-03-24 Dengfeng Wang , Shunqin Cai , Yanan Sun

Processing-in-memory (PIM) promises to alleviate the data movement bottleneck in modern computing systems. However, current real-world PIM systems have the inherent disadvantage that their hardware is more constrained than in conventional…

Mathematical Software · Computer Science 2023-09-07 Maurus Item , Juan Gómez-Luna , Yuxin Guo , Geraldo F. Oliveira , Mohammad Sadrosadati , Onur Mutlu

Processing In Memory (PIM) accelerators are promising architecture that can provide massive parallelization and high efficiency in various applications. Such architectures can instantaneously provide ultra-fast operation over extensive…

Hardware Architecture · Computer Science 2022-07-26 Kazi Abu Zubair , Sumit Kumar Jha , David Mohaisen , Clayton Hughes , Amro Awad

Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular…

Hardware Architecture · Computer Science 2025-11-26 Youngsuk Kim , Junghwan Lim , Hyuk-Jae Lee , Chae Eun Rhee

Recent advances in machine learning (ML) have spotlighted the pressing need for computing architectures that bridge the gap between memory bandwidth and processing power. The advent of deep neural networks has pushed traditional Von Neumann…

Hardware Architecture · Computer Science 2024-07-12 Febin Sunny , Amin Shafiee , Abhishek Balasubramaniam , Mahdi Nikdast , Sudeep Pasricha

Heterogeneous computing is the strategy of deploying multiple types of processing elements within a single workflow, and allowing each to perform the tasks to which is best suited. To fully harness the power of heterogeneity, we want to be…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-03 Nikolaos Mavrogeorgis

SRAM-based compute-in-memory (CIM) offers high computational density and energy efficiency for deep neural network (DNN) accelerators, but its limited capacity causes on/off-chip data movement overhead for large DNN models. Existing CIM…

Hardware Architecture · Computer Science 2026-04-21 Chenhao Xue , Yukun Wang , An Guo , Yuhui Shi , Jinwei Zhou , Xiping Dong , Yihan Yin , Yuanpeng Zhang , Tianyu Jia , Wei Gao , Qiang Wu , Xin Si , Jun Yang , Guangyu Sun

The latest trends in high-performance computing systems show an increasing demand on the use of a large scale multicore systems in a efficient way, so that high compute-intensive applications can be executed reasonably well. However, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-02-25 Juliana M. N. Silva , Cristina Boeres , Lúcia M. A. Drummond , Artur A. Pessoa

Recently DRAM-based PIMs (processing-in-memories) with unmodified cell arrays have demonstrated impressive performance for accelerating AI applications. However, due to the very restrictive hardware constraints, PIM remains an accelerator…

Hardware Architecture · Computer Science 2023-10-17 Jaewoo Park , Sugil Lee , Jongeun Lee

Computing is bottlenecked by data. Large amounts of application data overwhelm storage capability, communication capability, and computation capability of the modern machines we design today. We argue that an intelligent architecture should…

Hardware Architecture · Computer Science 2020-12-24 Onur Mutlu

The substantial memory bandwidth and computational demands of large language models (LLMs) present critical challenges for efficient inference. To tackle this, the literature has explored heterogeneous systems that combine neural processing…

Hardware Architecture · Computer Science 2026-05-05 Yuzong Chen , Chao Fang , Xilai Dai , Yuheng Wu , Thierry Tambe , Marian Verhelst , Mohamed S. Abdelfattah

Given their increasing size and complexity, the need for efficient execution of deep neural networks has become increasingly pressing in the design of heterogeneous High-Performance Computing (HPC) and edge platforms, leading to a wide…

The resurgence of near-memory processing (NMP) with the advent of big data has shifted the computation paradigm from processor-centric to memory-centric computing. To meet the bandwidth and capacity demands of memory-centric computing, 3D…

Hardware Architecture · Computer Science 2021-04-29 Pritam Majumder , Jiayi Huang , Sungkeun Kim , Abdullah Muzahid , Dylan Siegers , Chia-Che Tsai , Eun Jung Kim
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