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In-memory computing on a reconfigurable architecture is the emerging field which performs an application-based resource allocation for computational efficiency and energy optimization. In this work, we propose a Ferroelectric…

While scaling laws for recommendation models have gained significant traction, existing architectures such as Wukong, HiFormer and DHEN, often struggle with sub-optimal designs and hardware under-utilization, limiting their practical…

This paper presents a novel approach for performing computations using Look-Up Tables (LUTs) tailored specifically for Compute-in-Memory applications. The aim is to address the scalability challenges associated with LUT-based computation by…

Hardware Architecture · Computer Science 2023-11-20 Peyman Dehghanzadeh , Baibhab Chatterjee , Swarup Bhunia

Increasing AI computing demands and slowing transistor scaling have led to the advent of Multi-Chip-Module (MCMs) based accelerators. MCMs enable cost-effective scalability, higher yield, and modular reuse by partitioning large chips into…

Hardware Architecture · Computer Science 2025-05-06 Ritik Raj , Shengjie Lin , William Won , Tushar Krishna

Recent advancements in neural network quantisation have yielded remarkable outcomes, with three-bit networks reaching state-of-the-art full-precision accuracy in complex tasks. These achievements present valuable opportunities for…

Hardware Architecture · Computer Science 2024-03-19 Daniel Gerlinghoff , Benjamin Chen Ming Choong , Rick Siow Mong Goh , Weng-Fai Wong , Tao Luo

Large language models (LLMs) demand significant memory and computation resources. Wafer-scale chips (WSCs) provide high computation power and die-to-die (D2D) bandwidth but face a unique trade-off between on-chip memory and compute…

Hardware Architecture · Computer Science 2025-12-17 Huizheng Wang , Taiquan Wei , Zichuan Wang , Dingcheng Jiang , Qize Yang , Jiaxin Liu , Jingxiang Hou , Chao Li , Jinyi Deng , Yang Hu , Shouyi Yin

Graph search and sparse data-structure traversal workloads contain challenging irregular memory patterns on global data structures that need to be modified atomically. Distributed processing of these workloads has relied on server threads…

Hardware Architecture · Computer Science 2024-04-23 Marcelo Orenes-Vera , Esin Tureci , David Wentzlaff , Margaret Martonosi

Suffix Array (SA) is a cardinal data structure in many pattern matching applications, including data compression, plagiarism detection and sequence alignment. However, as the volumes of data increase abruptly, the construction of SA is not…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-05-16 Hsiang-Huang Wu , Chien-Min Wang , Hsuan-Chi Kuo , Wei-Chun Chung , Jan-Ming Ho

Memory disaggregation can potentially allow memory-optimized range indexes such as B+-trees to scale beyond one machine while attaining high hardware utilization and low cost. Designing scalable indexes on disaggregated memory, however, is…

Databases · Computer Science 2024-05-24 Baotong Lu , Kaisong Huang , Chieh-Jan Mike Liang , Tianzheng Wang , Eric Lo

This paper focuses on data structures for multi-core reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of an efficient solution is the storage of visited states. In related…

Distributed, Parallel, and Cluster Computing · Computer Science 2010-05-06 Alfons Laarman , Jaco van de Pol , Michael Weber

The continuous shift of computational bottlenecks to the memory access and data transfer, especially for AI applications, poses the urgent needs of re-engineering the computer architecture fundamentals. Many edge computing applications,…

Systems and Control · Electrical Eng. & Systems 2025-01-31 Georgios Papandroulidakis , Shady Agwa , Ahmet Cirakoglu , Themis Prodromakis

Tree-based models underpin many modern semantic search engines and recommender systems due to their sub-linear inference times. In industrial applications, these models operate at extreme scales, where every bit of performance is critical.…

Machine Learning · Computer Science 2022-02-25 Philip A. Etter , Kai Zhong , Hsiang-Fu Yu , Lexing Ying , Inderjit Dhillon

Nearest neighbor (NN) search is an essential operation in many applications, such as one/few-shot learning and image classification. As such, fast and low-energy hardware support for accurate NN search is highly desirable. Ternary…

Fast parallel search capabilities on large datasets provided by content addressable memories (CAM) are required across multiple application domains. However compared to RAM, CAMs feature high area overhead and power consumption, and as a…

Hardware Architecture · Computer Science 2023-12-27 Leonid Yavits

The scaling laws for recommender systems have been increasingly validated, where MetaFormer-based architectures consistently benefit from increased model depth, hidden dimensionality, and user behavior sequence length. However, whether…

Applications with low data reuse and frequent irregular memory accesses, such as graph or sparse linear algebra workloads, fail to scale well due to memory bottlenecks and poor core utilization. While prior work with prefetching,…

Hardware Architecture · Computer Science 2023-05-05 Marcelo Orenes-Vera , Esin Tureci , David Wentzlaff , Margaret Martonosi

Index structures are one of the most important tools that DBAs leverage to improve the performance of analytics and transactional workloads. However, building several indexes over large datasets can often become prohibitive and consume…

Databases · Computer Science 2020-03-26 Alex Galakatos , Michael Markovitch , Carsten Binnig , Rodrigo Fonseca , Tim Kraska

The proliferation of the web presents an unsolved problem of automatically analyzing billions of pages of natural language. We introduce a scalable algorithm that clusters hundreds of millions of web pages into hundreds of thousands of…

Information Retrieval · Computer Science 2015-05-22 Christopher M. de Vries , Lance De Vine , Shlomo Geva , Richi Nayak

We introduce an improved unsupervised clustering protocol specially suited for large-scale structured data. The protocol follows three steps: a dimensionality reduction of the data, a density estimation over the low dimensional…

Machine Learning · Computer Science 2019-11-05 Joan Garriga , Frederic Bartumeus

Memory tiering is the norm to effectively tackle the increasing server memory total cost of ownership (TCO) and the growing data demands of modern data center workloads. However, the host-based state-of-the-art memory tiering solutions can…

Operating Systems · Computer Science 2025-06-09 Chandra Prakash , Aravinda Prasad , Sandeep Kumar , Sreenivas Subramoney