English
Related papers

Related papers: High-throughput Pairwise Alignment with the Wavefr…

200 papers

Processor-in-Memory (PIM) overlays and new redesigned reconfigurable tile fabrics have been proposed to eliminate the von Neumann bottleneck and enable processing performance to scale with BRAM capacity. The performance of these FPGA-based…

Hardware Architecture · Computer Science 2024-10-08 MD Arafat Kabir , Tendayi Kamucheka , Nathaniel Fredricks , Joel Mandebi , Jason Bakos , Miaoqing Huang , David Andrews

Large Language Models (LLMs) have become essential in a variety of applications due to their advanced language understanding and generation capabilities. However, their computational and memory requirements pose significant challenges to…

Hardware Architecture · Computer Science 2024-12-02 Cristobal Ortega , Yann Falevoz , Renaud Ayrignac

Vision Transformers (ViTs) have established new performance benchmarks in vision tasks such as image recognition and object detection. However, these advancements come with significant demands for memory and computational resources,…

Hardware Architecture · Computer Science 2026-02-10 Cong Wang , Zexin Fu , Jiayi Huang , Shanshi Huang

Machine learning algorithms have enabled computers to predict things by learning from previous data. The data storage and processing power are increasing rapidly, thus increasing machine learning and Artificial intelligence applications.…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-09-14 Muhammad Fahad Saleem

Processing-in-cache (PiC) and Processing-in-memory (PiM) architectures, especially those utilizing bit-line computing, offer promising solutions to mitigate data movement bottlenecks within the memory hierarchy. While previous studies have…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Tosiron Adegbija , Kevin Gomez

Recent advances in machine learning (ML) have spotlighted the pressing need for computing architectures that bridge the gap between memory bandwidth and processing power. The advent of deep neural networks has pushed traditional Von Neumann…

Hardware Architecture · Computer Science 2024-07-12 Febin Sunny , Amin Shafiee , Abhishek Balasubramaniam , Mahdi Nikdast , Sudeep Pasricha

High performance large scale graph analytics are essential to timely analyze relationships in big data sets. Conventional processor architectures suffer from inefficient resource usage and bad scaling on those workloads. To enable efficient…

Computing-In-Memory (CIM) offers a potential solution to the memory wall issue and can achieve high energy efficiency by minimizing data movement, making it a promising architecture for edge AI devices. Lightweight models like MobileNet and…

Hardware Architecture · Computer Science 2025-08-21 Choongseok Song , Doo Seok Jeong

In this paper, we present GradPIM, a processing-in-memory architecture which accelerates parameter updates of deep neural networks training. As one of processing-in-memory techniques that could be realized in the near future, we propose an…

Machine Learning · Computer Science 2021-02-16 Heesu Kim , Hanmin Park , Taehyun Kim , Kwanheum Cho , Eojin Lee , Soojung Ryu , Hyuk-Jae Lee , Kiyoung Choi , Jinho Lee

Although deep learning-based personalized recommendation systems provide qualified recommendations, they strain data center resources. The main bottleneck is the embedding layer, which is highly memory-intensive due to its sparse, irregular…

Hardware Architecture · Computer Science 2025-11-26 Youngsuk Kim , Junghwan Lim , Hyuk-Jae Lee , Chae Eun Rhee

Unified Virtual Memory (UVM) relieves the developers from the onus of maintaining complex data structures and explicit data migration by enabling on-demand data movement between CPU memory and GPU memory. However, on-demand paging soon…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-11 Xinjian Long , Xiangyang Gong , Huiyang Zhou

In this paper, we address the problem of efficient execution of a computation pattern, referred to here as the irregular wavefront propagation pattern (IWPP), on hybrid systems with multiple CPUs and GPUs. The IWPP is common in several…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-09-18 George Teodoro , Tony Pan , Tahsin Kurc , Jun Kong , Lee Cooper , Joel Saltz

This paper presents PRIMAL, a processing-in-memory (PIM) based large language model (LLM) inference accelerator with low-rank adaptation (LoRA). PRIMAL integrates heterogeneous PIM processing elements (PEs), interconnected by 2D-mesh…

Hardware Architecture · Computer Science 2026-01-21 Yue Jiet Chong , Yimin Wang , Zhen Wu , Xuanyao Fong

High-performance computing systems are moving towards 2.5D and 3D memory hierarchies, based on High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) to mitigate the main memory bottlenecks. This trend is also creating new opportunities…

Hardware Architecture · Computer Science 2017-09-26 Erfan Azarkhish , Davide Rossi , Igor Loi , Luca Benini

We develop a novel parallel resampling algorithm for fully parallelized particle filters, which is designed with GPUs (graphics processing units) or similar parallel computing devices in mind. With our new algorithm, a full cycle of…

Computation · Statistics 2016-08-17 Kenichiro McAlinn , Teruo Nakatsuma

Specialized function gradient computing hardware could greatly improve the performance of state-of-the-art optimization algorithms, e.g., based on gradient descent or conjugate gradient methods that are at the core of control, machine…

The performance and efficiency of running large-scale datasets on traditional computing systems exhibit critical bottlenecks due to the existing "power wall" and "memory wall" problems. To resolve those problems, processing-in-memory (PIM)…

Hardware Architecture · Computer Science 2022-04-22 Yinglin Zhao , Jianlei Yang , Bing Li , Xingzhou Cheng , Xucheng Ye , Xueyan Wang , Xiaotao Jia , Zhaohao Wang , Youguang Zhang , Weisheng Zhao

The substantial memory bandwidth and computational demands of large language models (LLMs) present critical challenges for efficient inference. To tackle this, the literature has explored heterogeneous systems that combine neural processing…

Hardware Architecture · Computer Science 2026-05-05 Yuzong Chen , Chao Fang , Xilai Dai , Yuheng Wu , Thierry Tambe , Marian Verhelst , Mohamed S. Abdelfattah

In-Memory Computing (IMC) has emerged as a promising paradigm for energy-efficient, throughput-efficient and area-efficient machine learning at the edge. However, the differences in hardware architectures, array dimensions, and fabrication…

Signal Processing · Electrical Eng. & Systems 2024-05-27 Jiacong Sun , Pouya Houshmand , Marian Verhelst

MIMO interference network optimization is important for increasingly crowded wireless communication networks. We provide a new algorithm, named Dual Link algorithm, for the classic problem of weighted sum-rate maximization for MIMO…

Information Theory · Computer Science 2016-04-05 Xing Li , Seungil You , Lijun Chen , An Liu , Youjian , Liu
‹ Prev 1 3 4 5 6 7 10 Next ›