Related papers: The design of a time-interleaved analog-digital co…
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital…
As the development of electronic science and technology, electronic data acquisition (DAQ) system is more and more widely applied to nuclear physics experiments. Workstations are often utilized for data storage, data display, data…
Some applications require electronic systems to operate at extremely high temperature. Extending the operating temperature range of automotive-grade CMOS processes -- through the use of dedicated design techniques -- can provide an…
Single photon avalanche diode (SPAD) arrays have proven themselves as serious candidates for time of flight positron emission tomography (PET). Discrete readout schemes mitigate the low-noise requirements of analog schemes and offer very…
In state-of-the-art positron emission (PET) tomography systems, application-specific integrated circuits (ASICs)are commonly used to precisely digitize the signals of analog silicon photo-multipliers (SiPMs). However, when operating PET…
Analog-to-digital converters (ADCs) facilitate the conversion of analog signals into a digital format. While the specific designs and settings of ADCs can vary depending on their applications, it is crucial in many modern applications to…
The time-domain technique for impedance spectroscopy consists of computing the excitation voltage and current response Fourier images by fast or discrete Fourier transformation and calculating their relation. Here we propose an alternative…
This paper describes a step by step approach for implementing a scalable and run-time adaptable multi-standard packet detector for orthogonal frequency divisional multiplexing (OFDM) based communication standards. The paper briefly…
Intrinsic nonlinearity in FPGA-based time-to-digital converters (TDCs) is often treated as a calibration issue and evaluated mainly through post-correction metrics. In quantum key distribution (QKD), however, raw delay-line nonuniformity…
Recording of flash-ADC traces is challenging from both the transmission bandwidth and storage cost perspectives. This paper presents a configuration-free lossless compression algorithm which addresses both limitations, by compressing the…
Obtaining digital representations of multivariate continuous-time (CT) signals is a challenge encountered in many signal processing systems. In practice, these signals are often acquired to extract some underlying information, i.e., for a…
In this paper we describe a single-node, double precision Field Programmable Gate Array (FPGA) implementation of the Conjugate Gradient algorithm in the context of Lattice Quantum Chromodynamics. As a benchmark of our proposal we invert…
We present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low-Power…
The need for wireless communication has driven the communication systems to high performance. However, the main bottleneck that affects the communication capability is the Fast Fourier Transform (FFT), which is the core of most modulators.…
Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC…
We designed an FPGA fabric to provide phase modulation techniques to lock lasers to optical frequency references. The method incorporates an active residual-amplitude-modulation (RAM) suppression scheme that relies on complex modulation.…
We present the timing characteristics of the flash ADC readout of the GlueX forward calorimeter, which depends on precise measurement of arrival time of pulses from FEU 84-3 photomultiplier tubes to suppress backgrounds. The tests presented…
This paper proposes a high-precision time measurement method based on digital frequency-domain phase-fitting (DFPF) by using the digitized nuclear pulses. The averaging effect inherent in the frequency-domain cross-correlation and…
A 3.8ps root mean square (RMS) time synchronization implemented in a 20nm fabrication process ultrascale kintex Field Programmable Gate Array (FPGA) is presented. The multichannel high-speed serial transceivers (e.g. GTH) play a key role in…
The Data Acquisition System (DAQ) for the LUX-ZEPLIN (LZ) dark matter detector is described. The signals from 745 PMTs, distributed across three subsystems, are sampled with 100-MHz 32-channel digitizers (DDC-32s). A basic waveform analysis…