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The 3D point cloud perception has emerged as a fundamental role for a wide range of applications. In particular, with the rapid development of neural networks, the voxel-based networks attract great attention due to their excellent…

Hardware Architecture · Computer Science 2024-10-01 Xipeng Lin , Shanshi Huang , Hongwu Jiang

Ternary Deep Neural Networks (DNN) have shown a large potential for highly energy-constrained systems by virtue of their low power operation (due to ultra-low precision) with only a mild degradation in accuracy. To enable an…

Hardware Architecture · Computer Science 2024-08-27 Niharika Thakuria , Akul Malhotra , Sandeep K. Thirumala , Reena Elangovan , Anand Raghunathan , Sumeet K. Gupta

Non-orthogonal multiple access (NOMA) technique is important for achieving a high data rate in next-generation wireless communications. A key challenge to fully utilizing the effectiveness of the NOMA technique is the optimization of the…

Information Theory · Computer Science 2024-10-28 Teppei Otsuka , Aohan Li , Hiroki Takesue , Kensuke Inaba , Kazuyuki Aihara , Mikio Hasegawa

In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable…

Numerous applications such as graph processing, cryptography, databases, bioinformatics, etc., involve the repeated evaluation of Boolean functions on large bit vectors. In-memory architectures which perform processing in memory (PIM) are…

Hardware Architecture · Computer Science 2021-12-02 Gian Singh , Ankit Wagle , Sarma Vrudhula , Sunil Khatri

Triangle counting (TC) is a fundamental problem in graph analysis and has found numerous applications, which motivates many TC acceleration solutions in the traditional computing platforms like GPU and FPGA. However, these approaches suffer…

Hardware Architecture · Computer Science 2020-07-22 Xueyan Wang , Jianlei Yang , Yinglin Zhao , Yingjie Qi , Meichen Liu , Xingzhou Cheng , Xiaotao Jia , Xiaoming Chen , Gang Qu , Weisheng Zhao

This paper presents a low cost PMOS-based 8T (P-8T) SRAM Compute-In-Memory (CIM) architecture that efficiently per-forms the multiply-accumulate (MAC) operations between 4-bit input activations and 8-bit weights. First, bit-line (BL)…

Hardware Architecture · Computer Science 2022-11-30 Joonhyung Kim , Kyeongho Lee , Jongsun Park

Applications of Binary Neural Networks (BNNs) are promising for embedded systems with hard constraints on computing power. Contrary to conventional neural networks with the floating-point datatype, BNNs use binarized weights and activations…

Emerging Technologies · Computer Science 2022-11-14 Mahdi Zahedi , Taha Shahroodi , Stephan Wong , Said Hamdioui

Using Resistive Random Access Memory (RRAM) crossbars in Computing-in-Memory (CIM) architectures offers a promising solution to overcome the von Neumann bottleneck. Due to non-idealities like cell variability, RRAM crossbars are often…

Processing-in-memory (PIM) is a transformative architectural paradigm designed to overcome the Von Neumann bottleneck. Among PIM architectures, digital SRAM-PIM emerges as a promising solution, offering significant advantages by directly…

Hardware Architecture · Computer Science 2025-06-13 Cenlin Duan , Jianlei Yang , Yikun Wang , Yiou Wang , Yingjie Qi , Xiaolin He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weisheng Zhao

Homomorphic encryption (HE) allows direct computations on encrypted data. Despite numerous research efforts, the practicality of HE schemes remains to be demonstrated. In this regard, the enormous size of ciphertexts involved in HE…

Cryptography and Security · Computer Science 2020-10-27 Dayane Reis , Jonathan Takeshita , Taeho Jung , Michael Niemier , Xiaobo Sharon Hu

Edge deployment of low-batch large language models (LLMs) faces critical memory bandwidth bottlenecks when executing memory-intensive general matrix-vector multiplications (GEMV) operations. While digital processing-in-memory (PIM)…

Hardware Architecture · Computer Science 2026-01-21 Ye Lin , Chao Fang , Xiaoyong Song , Qi Wu , Anying Jiang , Yichuan Bai , Li Du

Recent research has sought to accelerate cryptographic hash functions as they are at the core of modern cryptography. Traditional designs, however, suffer from the von Neumann bottleneck that originates from the separation of processing and…

Hardware Architecture · Computer Science 2022-06-03 Batel Oved , Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

Neuro-symbolic artificial intelligence (AI) excels at learning from noisy and generalized patterns, conducting logical inferences, and providing interpretable reasoning. Comprising a 'neuro' component for feature extraction and a 'symbolic'…

In-Memory Acceleration (IMA) promises major efficiency improvements in deep neural network (DNN) inference, but challenges remain in the integration of IMA within a digital system. We propose a heterogeneous architecture coupling 8 RISC-V…

Hardware Architecture · Computer Science 2021-09-06 Gianmarco Ottavi , Geethan Karunaratne , Francesco Conti , Irem Boybat , Luca Benini , Davide Rossi

As CMOS scaling reaches its technological limits, a radical departure from traditional von Neumann systems, which involve separate processing and memory units, is needed in order to significantly extend the performance of today's computers.…

In this paper, we propose a high-precision SRAM-based CIM macro that can perform 4x4-bit MAC operations and yield 9-bit signed output. The inherent discharge branches of SRAM cells are utilized to apply time-modulated MAC and 9-bit ADC…

Hardware Architecture · Computer Science 2023-07-20 Xiaomeng Wang , Fengshi Tian , Xizi Chen , Jiakun Zheng , Xuejiao Liu , Fengbin Tu , Jie Yang , Mohamad Sawan , Kwang-Ting Cheng , Chi-Ying Tsui

Compute-in-memory (CIM) has emerged as a pivotal direction for accelerating workloads in the field of machine learning, such as Deep Neural Networks (DNNs). However, the effective exploitation of sparsity in CIM systems presents numerous…

Hardware Architecture · Computer Science 2025-11-21 Yingjie Qi , Jianlei Yang , Rubing Yang , Cenlin Duan , Xiaolin He , Ziyan He , Weitao Pan , Weisheng Zhao

In memory computing (IMC) architectures for deep learning (DL) accelerators leverage energy-efficient and highly parallel matrix vector multiplication (MVM) operations, implemented directly in memory arrays. Such IMC designs have been…

Emerging Technologies · Computer Science 2024-08-14 Arkapravo Ghosh , Hemkar Reddy Sadana , Mukut Debnath , Panthadip Maji , Shubham Negi , Sumeet Gupta , Mrigank Sharad , Kaushik Roy

With the recent growth in demand for large-scale deep neural networks, compute in-memory (CiM) has come up as a prominent solution to alleviate bandwidth and on-chip interconnect bottlenecks that constrain Von-Neuman architectures. However,…

Hardware Architecture · Computer Science 2024-03-19 Souvik Kundu , Anthony Sarah , Vinay Joshi , Om J Omer , Sreenivas Subramoney